Server Management Controllers, Sensors, and Tools

(1)

Intel

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Spring 2001

Server Management Controllers, Sensors, and Tools

Tom Slaight

Server Management Architect Enterprise Platforms Group Intel Corporation

March 1, 2001

(2)

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Introduction



Audience:

Architects, Technical Managers, Firmware Leads, and Hardware Designers

– Involved in architecture, component selection, debug, test, or design of server baseboard and peripheral management subsystems



Focus:

– IPMI-based implementations – Hardware components

– Hardware and firmware development tools

(3)

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Disclaimers



A good starting point.

– … but not a comprehensive list of vendors or available technology



Listing of particular vendors and products does not constitute a particular

endorsement by Intel or the IPMI Promoters



No guarantees on accuracy of information provided



Contact vendors directly for complete

specifications and availability information

(4)

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Agenda



Server Management Architecture Overview



Baseboard Management Controllers



Enclosure/Peripheral Controllers



Sensor Devices



Putting it all together - design advice and tools



Summary and Call to Action

(5)

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IPMI

Intelligent Platform

Management Interface

• Defines a common, abstracted,

message-based interface to intelligent platform management hardware

• Defines common records for describing common platform management devices and their characteristics

• Supports OEM differentiation and value added features

• Promoters: Intel, HP, NEC & Dell

(6)

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IPMI Promoter, Contributor, and Adopter News

 Interphase Corporation

 InterWorks Computer Products

 Inventec Corporation

 Ipex ITG

 JMC Products

 L-3 Communications Corp.

 Lynux Works, Inc.

 Macrolink, Inc

 Magnetek, Inc.

 Micro-Star International

 Mitsubishi Electric Corp.

Information Systems Engineering Center

 National Semiconductor Corp.

 NEC Corporation

 Nematron Corporation

 Network Engines, Inc.

 NOCpulse, Inc.

 Olivetti Computers Worldwide

 Open Source Asia

 PEP Modular Computers

 Phoenix Technologies Ltd.

 Praim, Inc.

 Qlogic Corporation

 Radisys Corporation

 Reliance Computer Corporation

 Sanera Systems, Inc.

 Acer Inc.

 Agilent Technologies GmbH

 Alberta Microelectronics

 American Megatrends Inc.

 Arima Computer Corp.

 ASUSTek Computer, Inc.

 Blue Wave Systems

 Bull S.A.

 Celestica

 CyberGuard Corporation

 Data General Corporation

 Dell Computer Corporation

 Egenera, Inc.

 ElanVital Corporation

 Ericsson UAB

 Evans & Sutherland

 Eversys Corporation

 Exabyte Corporation

 FORCE Computers GmbH

 Fujitsu, Ltd.

 GoAhead Software, Inc.

 HADCO Corporation

 Hewlett-Packard Company

 Hewlett-Packard GmbH

 Hitachi Ltd.

 Hybricon Corporation

 InnoMediaLogic, Inc.

 SBS Technologies

(Industrial Computers GmbH)

 Scenix

Semiconductor, Inc.

 Siemens AG

 Silicon Graphics, Inc.

 Stratus Computer Systems Ireland Ltd.

 Sun Microsystems

 Super Micro Computer, Inc.

 Symphony Group Intl. Co., Ltd.

 Synergy Microsystems

 Teknor Applicom, Inc.

 T-Netix, Inc.

 Tatung Co.

 Tektronix

 Texas Micro Corporation

 Toshiba Corporation

 Trimm Technologies

 Tyan Computer Corporation

 Universal Scientific Industrial Corp.

 USAR Systems, Inc.

 Vitesse Semiconductor Corp.

 Vividon, Inc.

 Vooha, Inc.

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Initiative News

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Example Architecture

Baseboard System Bus SENSORs

& control circuitry

ICMB Bridge Controller

ICMB

Aux. IPMB

Remote Mgmt. Card

SMBus / PCI Mgmt. Bus Mgmt

NIC

LAN

PCI

System Interface

Baseboard Mgmt.

Controller (BMC) I²C / SMBus

SDR, SEL, FRU

NV Store RS-232

MODEM / Serial

IPMB

Chassis

Monitoring

FRU SEEPROM

Enclosure Mgmt.

Controller

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Future:

PCI Management Bus



Provides SMBus connection across the PCI slots

– 3.3 V Bus with timing and electricals per SMBus 2.0 ‘high power’ specification

– Remains operative on standby power



Uses SMBus 2.0 Address Resolution

Protocol (ARP) to assign addresses to Add- in cards

– Fixed address devices can still be used on

baseboard

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Future:

ASF Sensor Devices



ASF = Alert Standard Forum specification

– From DMTF Pre-OS Working Group

– Currently out for DMTF membership review



Defines SMBus interface for Sensor Devices

– Provides commands for retrieving event status in a standardized, abstracted format

– Uses IPMI sensor and event enumerations

– Provides commands for providing asynchronous notification w/o requiring SMBAlert line

– Data can be easily mapped to a Platform Event Trap or IPMI Event



Designed to work with PCI Management Bus...

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PCI Management Bus

Server/IPMI application

BMC Polls

Sensor Devices

System Management Software accesses abstracted sensors and logged events during run-time

LAN Controller A LAN

Controller B

BMC

PCI SMBus

System Bus ASF

Sensor Device

ASF Sensor

Device

SEL Events

Logged BMC ‘pushes’ events out to NIC(s)

Remote console software accesses BMC via NIC

= IPMI over LAN...

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Agenda



Sensor Devices



Summary

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BMC Features to look for…

Built-in System Interface



For IPMI, three types possible:

–

KCS (Keyboard Controller Style) most popular.

–

BT (Block Transfer) is fastest.

–

SMIC (Server Mgmt. Interface Chip) for

implementation via external ASIC or FPGA.



Look for “low glue” connection to chip set

–

LPC or ISA “X-bus” interfaces commonly used

–

IPMI specifications now support memory mapped

implementations as well as original I/O mapped



Look for System Interface interrupt support

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Built-in System Interfaces

 Multiple Built-in System Interfaces

– KCS interface hardware can be used to

implement an ACPI EC (Embedded Controller) interface

– Additional interface can support OEM

differentiation access, such as from an SMI

Handler

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I 2 C/SMBus Support



At least three Master-Slave interfaces recommended:

5V Master-slave capable for IPMB

3.3V Master-slave for PCI Mgmt. Bus

Additional M/S interface for LAN / Future



Interfaces should support multiple slave addresses

One fixed for I²C broadcast (00h)

One programmable for device as IPMI target

Second programmable for snoop/SMBus host target



SMBus and I

²

C-compatible timing

– Increases implementation options [ More on this topic later…]

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I 2 C/SMBus Support

Support for multiple private management busses

– Multiple private busses can reduce need for external I

²

C bus multiplexing

– Hardware-based m/s or slave-only hardware- based interfaces are best

– Important for LAN Controller interface performance

– ‘Open drain’ or ‘quasi- bi-directional’ I/O can be used to create ‘bit banged’ private busses

– Mainly useful for interfacing to sensor devices,

particularly ones that do not require extensive polling

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Processor & I/O Power



Low Power Consumption

– <50 mA is a pretty good target



3.3V operation with 5V tolerance

– 5V Standby being replaced by 3.3V Standby in PC platforms

– 5V tolerance on at least one I

²

C interface reduces cost of IPMB support

– 5V tolerance on I/O enables supports

– 5V-based status signals

– Bit-banged access to SEEPROMs that are spec’d on 5V, e.g. Power Supply FRU

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Flexible I/O



Option to select open-drain or driven outputs

– Supports flexible allocation of I/O functions across products

– Reduces need for external pullups

– Enables software to use I/O as ‘strapping’ inputs for selecting f/w options



High-sink outputs (>12mA)

– Can be used for direct LED drive

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UARTs and Timers

 Internal UARTs w/hardware handshake support

– Built-in UART for direct ICMB support – Additional UART for IPMI-over-Modem

application

 Firmware Timer

– Timer for firmware scheduler

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Interrupt Support

Multiple Interrupts

– Multiple external interrupts for asynchronous event capture

– Multiple internal interrupts from

interfaces, timers, etc. for efficient code performance

– Multi-level interrupts for deterministic

prioritization

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BMC Features to look for...

FAN monitoring & control



Timers or Counters for Tach FAN Speed monitoring

– Tach FAN speed can be accumulated using a single counter with a digital multiplexer

– FAN speed is calculated by accumulating counts per unit time, e.g. 1 second.

– Time to accumulate FAN speeds scales with number of FANs. I.e. monitoring 8 fans takes 8 seconds.



Pulse-width Modulator (PWM) or D/A

outputs for FAN Speed control

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Built-in Analog-to-Digital



Need for at least 7 voltages is common

– E.g. Processor 1 & 2, 3.3V, 3.3Vaux, 5V, 12V, -12V



Many server systems require more

– >2 processors, SCSI terminations, bus, cache/chipset, etc.

– 19 or more is not uncommon!



Conversion rate usually not an issue...

– A single converter with analog multiplexing works well



But accuracy, tolerance, and resolution are

– Recommend at least 8-bit resolution, +/-1 bit tolerance, and +/-1% accuracy

Low accuracy paid for with system margins

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Extensibility and Headroom



ROM/RAM upgrade path

– Don’t want to run out of code space for new features...



Performance headroom for new functions such as LAN and Modem access

– Modem interfaces are likely to require protocols such as PPP

– New LAN and Modem interfaces require signature algorithms for security



External expansion capability for external

peripheral, I/O, and RAM/ROM

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Scalable and Maintainable

 Scalability

– Can one controller fit multiple products?

– ...Or is it part of a ‘family’ that can?

 Firmware Support & Maintenance

– Commercial high-level language tools – Commercial code debugging support – Vendor-provided debug tools

– Test port or emulator support

– Commercial RTOS options

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Low Bean Count

 Package and Board Space

– BGA packaging can provide higher density – Watch tradeoffs between package size and

overall solution cost

 Low unit cost

– Need I say more?

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Software Support

IPMI Firmware / SDK

– Vendors such as Qlogic, Vitesse Semiconductor, and Winbond offer IPMI firmware for their BMC and/or Enclosure Controller offerings.

– Typical SDKs support customer-developed extensions for ‘Value added’ features

– Vendors may also offer customization services

Firmware and SDKs yield faster TTM for

IPMI-based designs

(27)

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Management Controllers*

Mfr. product core

system

I/F I²C A/D serial type App

LED drv

special features

IPMI

F/W Avail.

Dallas Semi.

DS80CH11 8032 compat.

3 KCS via ISA

2 m/s

Y 1 8051 BMC no now

Hitachi H8/3337Y H8 8-bit

1 m/s

Y Y SCI BMC D/A,

PWM

no now H8S/2148 H8S

16-bit

2 m/s

Y Y SCI BMC D/A,

PWM

no now

Philips 80C652 8032

compat.

external req'd

1 m/s

no 1 8051 Sat / Bridge

no now 80C552 8032

compat.

external req'd

1 m/s

8 ch

1 8051 Sat / BMC

no now

Qlogic Zircon ARM7/

TDMI

3 KCS via LPC,

ISA

3 m/s

10 ch

2 "16550" BMC yes 8 PWM, ICMB assist,

12 fan tach

yes now

Qlogic Zircon

Lite

ARM7/

TDMI

BT, 2 KCS LPC/ISA

2 m/s

8 ch

1 same BMC / cPCI

yes 2 PWM, 8 fan tach

yes now Vitesse Semi. VSC210 R3000 3 KCS/

SMIC/ BT via LPC

3 m/s

no 3 ICE/GP FIFO'd ICMB

BMC / Sat

12mA fan tach, ICMB assist

yes now

Vitesse Semi. VSC215 R3000 3 KCS/

4 m/s

Y 4 ICE/GP FIFO'd ICMB

BMC / Sat

12mA fan tach, ICMB assist

yes now

Winbond W83910F 8032 compat.

3 KCS/

5 m/s

7 2 "16550" BMC yes PWM, LCD Module I/F, 4 temp diode

yes now Intel

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Agenda



Enclosure/Peripheral Management Controllers



Sensor Devices



Summary

(29)

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Enclosure/Peripheral Controllers

Example Block Diagram

Chassis Mgmt. Bd.

SCSI BUS

SEL SDRs

FRU

Virtual IPMB

SCSI Interface

ICMB Bridge

ICMB

Drive LEDs &

Slot Status

IPMI Messages

SAF-TE Commands Chassis

Mgmt.

Control

(30)

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Enclosure/Peripheral Controllers

Features to look for…



SAF-TE and SES Firmware

– Extensible / customizable?

– Configurable LED definitions?



IPMI Firmware / SDK

– IPMB Support?



Support for external sensors or FRU devices

– e.g. FAN & power monitoring

Firmware and SDKs yield faster TTM for

Enclosure/Peripheral Controllers

(31)

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Enclosure Controllers

Vitesse Semiconductor

SSC200 Enclosure Management Controller*

– Fibre Channel and Parallel SCSI management

– Two SFF-8076 ESI Ports with DMA

– Manages up to Four Parallel SCSI Bus Controllers

– Three Master/Slave Controllers

– 32-bit, 40Mhz R3000 RISC CPU with Debug Port – RS-232 Monitor Port, can support ICMB

– Up to 28 Programmable, General Purpose I/Os – 100-pin PQFP Package

– Firmware support for SAF-TE and SES

– Firmware support available for IPMB/ICMB

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Enclosure Controllers

Vitesse Semiconductor

VSC205 Enclosure Management Controller*

– Enhanced SSC200

– Built-in LVD SCSI controller in place of SFF 8067 I/F’s – SAF-TE, SES, and IPMI firmware available

– 160 PQFP Package – Available: Now

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Enclosure Controllers

Qlogic

GEM359 Enclosure Management Controller*

– Enhanced follow-on to GEM 354

– Built-in LVD SCSI I/Fs (Ultra 2 and Ultra 3)

– Two SFF-8067 interfaces provided for Fibre Channel applications

– 54 GPIO pins provided for status and control signals – Two Master/Slave I²C interfaces for IPMB support and

additional expansion

– UART for debug support

– SAF-TE, SES and IPMI firmware available – 144 LQPF

– Available: Now

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Peripheral/Chassis Controllers

Qlogic

Zircon PM*

– Peripheral / Satellite Management Controller

– Targeted to CompactPCI I/O boards (PICMG spec.) and IPMB-based server peripherals (satellite controller)

– 3 Master/Slave I²C interfaces – F/W Support for IPMB – up to 24 GPIO

– up to 6 A/D converters – IPMI firmware available

– samples March '01, production targeted May '01

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Enclosure/Peripheral Controllers*

Mfr. product core Periph. I/F I²C A/D serial type

LED drv

special features

IPMI

F/W Avail.

QLogic GEM 359 8-bit LVDS, 2 SFF-8067

2 m/s

1 16550 4 @ 12mA

4 tach fan, 3 PWM

yes now

QLogic Zircon PM ARM 7 TDM

n/a 3

m/s

6 1 @

12 mA

yes samples

~e.o.

March**

Vitesse Semi.

SSC100 R3000 Fibre Channel 3 m/s

N 2 ICE/GP FIFO'd ICMB

12mA ICMB Arbitration

yes now

VSC200 R3000 Fibre Channel, SFF-8067,

ESI

3 m/s

yes now

VSC205 R3000 SCSI 3

m/s

yes now

** Preliminary information provided

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Agenda



Sensor Devices



Summary

(37)

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Temperature Monitoring and Fan Control



Server system power increasing -Noise Reduction becomes more difficult

– Need to meet ISO 7779 and BLUE ANGEL specs



Desire for more granular speed control

– Audible FAN Speed Cycling can be disconcerting to user



Need for per-fan or per-zone control

– Driving all fans to same speed usually produces higher than needed noise level



Just one tool - not a panacea

– System Engineers still need to design mechanicals and select low-noise fans

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Automatic Fan Control



Controls fans speed

dependant on temperature



No software dependence (BIOS or OS)



Allows for

quiet fans,

while still

provides

adequate

cooling

(39)

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Board Temperature Sensors*

resol.

bits

acc

degC addr. dig. out pins Analog

Devices

AD7416

10

+/- 2

1 8

AD7417B

10

+/- 2

1 16

temp + 1ch A/D AD7418

10

+/- 3

1 8

temp + 4ch A/D Dallas

Semiconductor

DS75 9 +/- 2 8 1 8

DS1621 9 +/- 0.5 8 1 8 -25 to 100 +/- 2

DS1624 13 +/- 0.5 8 0 8 temp +

SEEPROM

DS1721 9 +/- 1 mask 1 8

DS1775 9 +/- 2 8 1 SOT23-5

National

Semiconductor

LM75 9 +/- 3 8 1 8 -25 to 100 +/- 2

LM77 9 +/- 3 4 2 8 10 to 65 +/- 1.5

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Processor/ Remote Diode Temperature Sensors*

Local

acc.

degC

Remote Diode

acc.

degC pins special Analog Devices ADM1021 1 +/- 1 1 +/- 3 16

Analog Devices ADM1028 1 +/- 2 2 +/- 3 16 FAN ctrl.

# Maxim MAX1617A 1 +/- 2 1 +/- 3 16

# National LM83 1 +/-3 3 +/- 3 16

# National LM84 1 +/- 1 1 +/- 3 16

# Philips NE1617 1 +/- 2 1 +/- 3 16

Texas Instr. THMC10 1 +/- 2.5 1 +/- 3 16

Texas Instr. THMC50 1 +/- 3 1 +/- 3 16 FAN ctrl., 2 A/D

# Pin Compatible

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Hardware Monitors*

volt. temp. fan VID

chassis intr

POST RAM

add'l I/F

fan ctrl

/special pins

data sheet Analog

Devices

ADM9240 6 1 internal 2 1x5 1 Analog out 24

ADM1024 8 2 remt. diode, 1 internal

2 1x5 1 Analog out 24 prelim.

ADM1025 5 1 remote diode, 1 internal

0 1x5 0 16 prelim.

Dallas

Semiconductor

DS1780 6 1 internal 2 1x5 1 Analog out 24

National

Semiconductor

LM78/79 7 1 internal 3 1x4 1 yes ISA 44

LM80 7 1 remt. sensor, 1 internal

2 0 1 24

LM81 6 1 internal 2 1x5 1 Analog out 24

LM87 8 2 remote diode, 1 internal

2 1x5 1 Analog out 24

Philips

Semiconductor

Heceta-IV * 5 1 remt. diode, 1 internal

0 1x5 0 16 prelim.

Winbond W83781D 7 3 remt. diode 3 1x5 1 ISA beep out 48

W83782D 9 3 remt. diode 2 1x5 1 yes ISA 3 PWM, beep 48 prelim.

W83783S 5 3 remt. diode 3 1x5 1 2 PWM, beep 24

W83L784R 5 2 remt. diode 2 1x5 1 FAN ctrl, beep 24

W83L785R 4 2 remt. diode 2 1x5 1 2 PWM,

9 GPIO

24 Intel

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Miscellaneous Sensors

Vitesse Semiconductor VSC055*

I

²

C Enhanced Backplane Controller

– Designed as a companion component to enclosure management processors

– I²C bus

– 8 Fan-speed monitor inputs – 8 Programmable PWM outputs

– 64 12mA, programmable, bi-directional I/O pins with individually selectable one of 7 LED flash rates

– 32 GPIO pins can be uses as FC-AL port bypass control pins

– Programmable interrupt control for 64 interrupt sources (I/O, bypass input transitions, and fan speed thresholds)

– 100-pin PQFP pkg.

– SSC050 is a subset of the VSC055 (e.g. 4 fans & PWM, 40 GPIO, 52 interrupt sources)*

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

3 Channel

± 1ºC Temp Sensor



19 voltage channels



8 x Fan Control and Monitoring



16 GPIO



8k EEPROM



48LQFP

Miscellaneous Sensors and Actuators

Analog Devices ADM1026*

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ADM1029

 3 Ch. ±1ºC Temp Sensor

 2 voltage channels

 Automatic Fan Control and Monitoring

 Supports Fan Hot Swap

 24 QSOP

ADM1031

 2 x Automatic Fan Control and Monitoring

 Fan Fault and Therm Fault indications

 16TSSOP

Miscellaneous Sensors and Actuators

Analog Devices ADM1029/31*

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Extend management

capabilities on top of IPMI

– Remote access for systems that lack built-in interfaces – Richer transport support

(e.g. tcp/ip, shttp)

– Local User Interfaces (e.g. html)

– Support for new media – Add’l local actions

(e.g. email alerts)

Example: Agilent

Technologies Remote

Baseboard

System Interface Baseboard

Mgmt.

Controller

Aux. IPMB

IPMB

Chassis

Monitoring

& control circuitry FRU SEEPROM

Enclosure Mgmt.

Controller SDR,

SEL, FRU

Remote Management

Card

LAN Serial / Modem Future

Monitoring

Remote Management Cards

(46)

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Agenda



Sensor Devices



Summary

(47)

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I²C/SMBus Application

Multiplexing

Multiplexing may be required when dealing with more than eight I

²

C slave devices of the same type

– E.g. when handling serial presence data SEEPROMs on DIMMs on an enterprise server memory board

– SSI Power Supplies also use A0h-AEh range !

Bonus FRU SEEPROM

A0 A2 A4 A6 A8 AA AC AE

A0 A0 A2 A4 A6 A8 AA AC AE

(48)

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CBT 3244

Multiplexing



Simple analog Switch plus control = I

²

C bus multiplexing

– e.g. CBT 3244 octal bus switch with quad enables



Best on private busses

– Watch out for series resistance effects

– CBT 3244 or compatible typically

<15 ohms, worst case



Can also be used for Isolation & Conversion



But requires GPIO lines to control

multiplexing...

(49)

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CB T 3244 PC F 857 4

+ =

1:4

I²C bus mux

Main

I²C I²C A I²C B I²C C I²C D

Multiplexing



Analog Switch plus I

²

C/SMBus Latch

= bus controllable multiplexing

Analog Switch

I

²

C Latch E.g. Philips PCA9544*

“4ch I

²

C Multiplexer

with Interrupts”

(50)

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Power Supply SEEPROM

Memory SEEPROM

BMC

Conversion & Isolation



Conversion required when dealing with different bus voltage levels



Isolation required when unpowered devices

‘short out’ bus

5V Standby 3.3 V

Level

Shift ISOL

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3.3V Device

5V BMC 3.3V

Device

5V Device I²C/SMBus Application

Conversion & Isolation

Example: Conversion circuit described in Philips Semiconductor’s I 2 C v2.0

specification

(52)

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Conversion & Isolation

Philips Semiconductors

PCA9515 I

²

C Bus Repeater*

–

Allows additional 400 pF bus segment

–

Can provide level translation

–

Plus ability to isolate segment 1 from segment 0.

–

Supports level translation (5V tolerant pins)

–

Pins go “Hi-Z” when device is un-powered.

–

Supports multi-master arbitration across the repeater

Possible application: Supporting PCI Mgmt. Bus

on >8 PCI Slots

(53)

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Multiplexing & Isolation

Philips Semiconductors

PCA9516 “5 channel I

²

C Hub”*

–

Allows multiple additional 400 pF bus segments

–

Segments can be individually isolated

–

Supports level translation

(5V tolerant pins)

–

Pins “Hi-Z” when device un-powered.

–

Supports multi-master arbitration across the repeater

Possible applications:

Supporting PCI Management Bus on >8 PCI Slots,

isolating SMBus to ‘hot-plug PCI’ slots, driving I2C to

(54)

Intel

Developer

Forum

Spring 2001

Mixing SMBus & I 2 C

SMBus 2.0 high-power I

²

C specifications are not directly compatible:

II²²CC((VVdddd--bbaasseedd)) SSMMBBuuss VVILIL MMAAXX 0.0.889V9V ((==00..99 VVdddd mmiinn)) 0.0.8800VV VVIHIH MMIINN 2.2.554V4V ((== 00..77 VVdddd mmaaxx)) 2.2.11VV VVOLOL, , MAMAXX 0.0.44VV aatt 33mmAA 0.0.44VV aatt 44mAmA TTHHDD; ;DADATT 00 nnss 303000 nnSS

RRIISSEE TTIMIMEE 10100000 nnss frfroomm 00..889V9V ttoo 22.5.544VV 10100000 nnss frfroomm 00..665V5V ttoo 22.2.255VV FFAALLLL TTIMIMEE** ououttppuutt sstataggee::

225050 nsns frfroomm 22..5544V V ttoo 00.8.899VV bubuss:: 33000 0 nnss

330000 nsns frfroomm 22..2255V V ttoo 00..6565VV

* I²C specifies a faster fall on the output stage in order to allow for the possible inclusion of external series ESD protection resistors

SMBus I

²

C

(55)

Intel

Developer

Forum

Spring 2001

Mixing SMBus & I²C - design for interoperability

Controllers & Sensor Devices



Design devices to sink 4mA, min.



Design devices to output I

²

C ‘1’ and SMBus ‘0’ levels.



Design devices to accept SMBus ‘1’ and I

²

C ‘0’ levels.



Output data with SMBus hold time [THD;DAT = 300 ns]



Accept data with I

²

C hold time [THD;DAT = 0 ns]



Recommended that new fixed-address sensor devices be discoverable per the SMBus 2.0 specification

Support ‘Dual Protocol’ in new

(56)

Intel

Developer

Forum

Spring 2001

Mixing SMBus & I²C - design for interoperability

Busses

Can often use ‘I

²

C’ devices on PCI Management bus

… if loading and rise times are compatible with SMBus and I

²

C specs:

– Bus loading designed to work with I

²

C 3 mA sink current [or all devices meet 4mA sink capability]

– Bus pullups and capacitance designed to meet 1000 ns Rise Time from 0.65V to 2.54V

I

²

C and SMBus devices can share same bus. But Master needs to be

compatible with the target.

(57)

Intel

Developer

Forum

Spring 2001

SMBus & I²C

Design Recommendations

Avoid using slave devices that lack data integrity checks on the IPMB or PCI

Management Bus

– Many of today’s simple devices don’t have checksums or error check codes

– Longer bus can have more noise

– A 3rd party firmware error could cause interrupts during transfers

– ‘Public’ Bus traffic is not deterministic. Poorly behaved masters could be ‘bus hogs’.

New devices should include SMBus PEC (Packet Error Check CRC) or use checksums ala IPMI messaging

(58)

Intel

Developer

Forum

Spring 2001

SMBus & I²C

Design Recommendations

Put simple, polled slave devices on Private Management Busses behind ASIC or

Management Controller

– Private management busses have deterministic bandwidth available for polling and device access

– Private management busses typically have well controlled noise and loading

– Devices inherit Management Controller data integrity on IPMB

– Management controllers provide checksummed interface to private management bus

(59)

Intel

Developer

Forum

Spring 2001

SMBus & I²C

Design Recommendations

Management Controller Support for

‘Stuck 0 clear’

– A simple slave that misses a clock on a read transaction can be left holding the data line low

– Detection requires ability to monitor the bus for a stuck 0 data condition

– Therefore, useful for firmware to be able to directly read state of bus pins

– Can free bus by clocking it until transfer completes or data goes to ‘1’

– Requires ability for firmware to clock bus, outputting a ‘1’

until bus clears

– I²C/SMBus controller state machine must be able to be

‘overridden’ so that it ignores 0 already on bus.

– One approach: allow firmware to drive bus pins as GPIO

(60)

Intel

Developer

Forum

Spring 2001

I²C/SMBus Testing

Scopes

‘Deep trace’ logic analyzer or scope for capturing I

²

C real-time events.

– Should be able capture at 1 microsecond or better for 100’s of milliseconds.

– We’ve had good luck with the Hewlett-Packard HP54645D* mixed-signal oscilloscope

– 2-channel digital scope plus 16 logic channels

– 200 Msa/s on 16 channels with 2 MB of memory per logic channel

– (Yields 2 seconds of capture at 1 Msa/s)

(61)

Intel

Developer

Forum

Spring 2001

I²C/SMBus Testing

Noise Tolerance



Check for ‘mid-byte’ START and STOP Con