PM] Joycelyn-Intel: Hi there! My name is Joycelyn and I am a Talent Advisor for Intel Malaysia

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Brunch with Sr. Managers at Intel Malaysia

NETWORKING LOUNGE

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[ 01/04/13 5:48 PM] Sejal-Intel:

Welcome to the "Brunch with Senior Managers at Intel Malaysia" Networking Lounge! Not sure where to go? Have a generic question? Just want to chat? We're here for you!

[ 01/04/13 5:50 PM] Joycelyn-Intel:

Hi there! My name is Joycelyn and I am a Talent Advisor for Intel Malaysia.

Welcome to our event. Do browse around and let me know if you need any information on Intel Malaysia.

[ 01/04/13 5:54 PM] EG-Intel: Hi, welcome, my name is EG Tan from Intel Architecture Group Malaysia, thanks for joining us for this event. Looking forward to hear talk to you.

[ 01/04/13 6:03 PM] Kalyan.Achanta: are you conducting interviews in this event

[ 01/04/13 6:04 PM] Joycelyn-Intel: @Kalyan: Not today, but please submit your resume so that we can contact you for an interview separately if there is a suitable position for you

[ 01/04/13 6:04 PM] Kalyan: ya i have already done that. ok hope you guys call me [ 01/04/13 6:04 PM] Kalyan: thanks

[ 01/04/13 6:05 PM] Joycelyn-Intel: We would like to have a chat with you to get to know you better and help you fit into a suitable position here at Intel.

[ 01/04/13 6:07 PM] Mohit: What kind of work is expected in IAG group of Intel Malaysia?? Is it complete SoC design from spec till gds2???

[ 01/04/13 6:11 PM] EG-Intel:

Intel Architecture Group Malaysia (IAG-M) develops integrated capabilities that enable our customers to deliver the best computing experiences. From Data Centers to Ultrabook™, Laptop, All-In-One Desktop Personal Computer, Tablet, Smart Phone and Embedded Devices. We do have a complete top to bottom SOC design from Spec to GDS.

[ 01/04/13 6:22 PM] Sandeep: hi

[ 01/04/13 6:22 PM] Joycelyn-Intel: @Sandeep: Hi. Welcome to our event. Is there anything in particular that you'd like to ask?

[ 01/04/13 6:23 PM] Sandeep: how is the event organized .. i mean could you please guide me about the various sub departments IASG is into .. i mean how the work is organized here

[ 01/04/13 6:24 PM] Sandeep: what i understood is there is a SOC design team ...

[ 01/04/13 6:25 PM] Sandeep: what about the frontend IP design and verification teams?

@Sandeep: We have some key positions that we are highlighting in today's event.

I'll list the positions in a while. For these positions, we have our Sr Managers available in individual booths in the Exhibit Hall who will be able to chat with you in further details about each position.

[ 01/04/13 6:27 PM] Sandeep: ok

[ 01/04/13 6:27 PM] EG-Intel: Sandeep, We have Soft IP and Hard IP design opportunities here, similar to Verification, Pre-Si and Post Si Validation.

[ 01/04/13 6:29 PM] Joycelyn-Intel: These are the positions we are highlighting in today's events. For more positions, please visit us at www.intel.com/jobs

[ 01/04/13 6:29 PM] Joycelyn-Intel: Structural Design Engineer

http://www.intel.com/jobs/jobsearch/index.htm?job=702091&src=CFE-12682 [ 01/04/13 6:29 PM] Joycelyn-Intel:

Senior Logic Design

Engineerhttp://www.intel.com/jobs/jobsearch/index.htm?job=702093&src=CFE- 12682

Senior Validation

SOC Pre-Silicon Design Validation

BIOS

[ 01/04/13 6:30 PM] Joycelyn-Intel: SOC

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[ 01/04/13 6:32 PM] Cheng: @Joycelyn-Intel: For those positions advertised as Senior Engineer, what is the grade level ?

[ 01/04/13 6:36 PM] Joycelyn-Intel: @Cheng Yee: Gr 6 and above [ 01/04/13 6:42 PM] Abhishek:

Hi Sejal/Joycelyne, I've not seen any requirement or mention about verification oppertunity with Intel, Malaysia; One of my friends in verification is currently looking for a change.

[ 01/04/13 6:44 PM] Abhishek: Pardon me, I seem to have miss-spelled your name, Joycelyn [ 01/04/13 6:45 PM] Joycelyn-Intel: @Abhishek: EG will take your question

[ 01/04/13 6:46 PM] EG-Intel: Abhishek, Can you elaborate more on what you mentioned : verification? are your referring to Schematic to Layout verification?

[ 01/04/13 6:47 PM] Abhishek: No, actually I was mentioning about Logic verification.

[ 01/04/13 6:47 PM] Abhishek: or Design verification as we call in my current company.

[ 01/04/13 6:48 PM] Abhishek: RTL verification.

[ 01/04/13 6:49 PM] EG-Intel: Abhisek, OK. We do have the front end and back end Design Validation (Verification) opportunities. Please request your friend to write in, thanks.

[ 01/04/13 6:49 PM] Abhishek: ok, thanks.

[ 01/04/13 6:55 PM] Vivek.: Hi

[ 01/04/13 6:57 PM] Rachel-Intel: @Vivek: Hi [ 01/04/13 7:10 PM] Mazlina-Intel:

The best way to keep in touch with Intel Corporation is to connect

viahttp://www.linkedin.com/company/intel-corporation?trk=cp_followed_name_intel- corporation

[ 01/04/13 7:11 PM] Ronald: hi

[ 01/04/13 7:13 PM] Yee.Zer-Intel: @Ronald - Hello [ 01/04/13 7:14 PM] Ronald: hi yee zer

[ 01/04/13 7:14 PM] Yee.Zer-Intel: Welcome to our virtual chat - how can i assist you today?

[ 01/04/13 7:15 PM] Ronald: yeah, its my first time to visit [ 01/04/13 7:15 PM] Ronald: i'm trying to browse thru the event

[ 01/04/13 7:15 PM] Yee.Zer-Intel: Ronald- Feel free to explore the various booths at the exhibition area [ 01/04/13 7:15 PM] Ronald: thanks!

[ 01/04/13 7:16 PM] Yee.Zer-Intel: We have some sr managers manning each booths and ready to take your questions

[ 01/04/13 7:16 PM] Yee.Zer-Intel: do you have a particular field of interest that i can help you assist in matching to a booth?

[ 01/04/13 7:18 PM] Ronald: i was trying to check the booths, my experience is mostly with assembly and test process

[ 01/04/13 7:19 PM] Srinivasaraman: Hello

[ 01/04/13 7:20 PM] Yee.Zer-Intel: @Srinivasaraman : Hello :) [ 01/04/13 7:20 PM] Srinivasaraman: Hi Yee.Zer. How are you ?

[ 01/04/13 7:20 PM] Yee.Zer-Intel: @Ronald: Let me know more of your areas of expertise

[ 01/04/13 7:21 PM] Yee.Zer-Intel: @srinivasan: I'm having a great time addressing many of the eager questions from the visitor. How can i make your day today?

[ 01/04/13 7:21 PM] Srinivasaraman: I am looking for design positions in SerDes/ Hard IP domain [ 01/04/13 7:22 PM] Srinivasaraman: I was wondering if you could help me with that ...

[ 01/04/13 7:23 PM] Yee.Zer-Intel: @Srinivasaraman : Yes, we regularly seek for HardIP talents

[ 01/04/13 7:23 PM] Srinivasaraman: @Yee.Zee --> thats great to know. I have 11+ years experience in IOs and SerDEs [ 01/04/13 7:23 PM] Yee.Zer-Intel: @Srinivasaraman: Give me a moment while i seek out a HardIP Manager to link

you up with [ 01/04/13 7:23 PM] Srinivasaraman: sure

[ 01/04/13 7:24 PM] Ronald: i used to do product transfers to high volume mfg and integration jobs [ 01/04/13 7:27 PM] Yee.Zer-Intel:

@Ronald: Thanks. We have R&D labs who may have a match. Unfortunately the Lab Manager isn't in this chat room. May you upload a resume and create a profile online at www.intel.com/jobs ?

[ 01/04/13 7:28 PM] Yee.Zer-Intel: @Srinivasaraman: I need a few minutes more as the manager is currently engaged [ 01/04/13 7:28 PM] Srinivasaraman: @Yee.Zee --> sure; I'll wait

[ 01/04/13 7:29 PM] Yee.Zer-Intel: @Srinivasaraman: I have Mr EG Tan (Sr Design Manager for the Intel Architecture

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Group). He is joining in to this chat to connect to you [ 01/04/13 7:30 PM] Srinivasaraman: Hello Mr EG Tan. How are you ?

[ 01/04/13 7:30 PM] EG-Intel: Hi Srini, I am fine, thank you.

[ 01/04/13 7:30 PM] EG-Intel: Srini, anyhting that I can help?

[ 01/04/13 7:30 PM] Srinivasaraman: I am looking for design positions in Hard IP/ Ser Des space

[ 01/04/13 7:31 PM] Srinivasaraman: I have 11+ years of post-graduate exp in I/O, SerDes, Memory links

[ 01/04/13 7:32 PM] EG-Intel: Currently we don;t have the opening, but I can review and keep your resume for our future hiring.

[ 01/04/13 7:32 PM] Srinivasaraman: Oh oK; do you have a time frame when you may have an opening ? [ 01/04/13 7:33 PM] EG-Intel: Our main focus on I/O designs are the high speed, low power design.

[ 01/04/13 7:33 PM] Ronald: @ Yee.Zer-Intel: thanks! will do...bye

[ 01/04/13 7:34 PM] Srinivasaraman: i see; could you please elabolrate on this ? are you takling about lp ddrX family ? [ 01/04/13 7:34 PM] EG-Intel: LP DDRx and next gen memory architecture.

[ 01/04/13 7:35 PM] Srinivasaraman: I have worked on DDR/ LP DDR memory PHYs also [ 01/04/13 7:35 PM] Srinivasaraman: is there any openings in this domain ?

[ 01/04/13 7:35 PM] Yee.Zer-Intel:

@Ronald - have a great day ahead. We have positions available on our Malaysia Factories that you might want to check out online (look for the Assembly Test Manufacturing group)

[ 01/04/13 7:39 PM] EG-Intel: Srini, I got your resume, let me review and forward to our Analog HIP technical manager. If there are available opening, we will keep in touch with you, [ 01/04/13 7:39 PM] Srinivasaraman: ok sounds good

[ 01/04/13 7:40 PM] Srinivasaraman: thanks a lot Mr EG

[ 01/04/13 7:44 PM] Srinivasaraman: @Yee.Zer --> thanks for connecting me to Mr EG

[ 01/04/13 7:45 PM] Yee.Zer-Intel: @Srinivasaraman - we look forward to your resume. Have a great weekend [ 01/04/13 7:45 PM] Yee.Zer-Intel: We have 15more minutes to the end of our event

[ 01/04/13 7:45 PM] Srinivasaraman: @Yee.Zeer --> please let me know email id to send resuem [ 01/04/13 7:46 PM] Prakash: Hello

[ 01/04/13 7:47 PM] Yee.Zer-Intel: it's yee.zer.ng@intel.com [ 01/04/13 7:47 PM] Yee.Zer-Intel: @Prakash : Hello

[ 01/04/13 7:47 PM] Yee.Zer-Intel:

Just a reminder that the event will be ending in 15 minutes. We’ll do our best to answer your questions in this time. For more information about Intel, please visit intel.com or connect with us through social media on Facebook, LinkedIn or Twitter! We love to hear your feedback! Please complete our short event survey located in the bottom left of the screen.

[ 01/04/13 7:47 PM] Prakash: @Yee.Zer: I got the invite to the event through Mazlina

[ 01/04/13 7:48 PM] Yee.Zer-Intel: @Srinivasaraman - we have obtained your resume. It has been sent to the HardIP mgr

[ 01/04/13 7:48 PM] Prakash: @Yee.Zer: I wanted to check if there are opportunities for Design for Test [ 01/04/13 7:49 PM] Yee.Zer-Intel: @Prakash - great. What areas are you interested in? We have booths ready for

you [ 01/04/13 7:49 PM] Srinivasaraman: OK

[ 01/04/13 7:49 PM] Srinivasaraman: thanks Yee.Zer

[ 01/04/13 7:49 PM] VENKATA: Hi, i have submitted my resume few days back.. did you receive that ? It was for structrual design engineer

[ 01/04/13 7:49 PM] Prakash: @Yee.Zer: I am interested in Design for Test opportunities [ 01/04/13 7:50 PM] Yee.Zer-Intel: @Venkata: I'm checking with the folks (give me a few mins) [ 01/04/13 7:51 PM] Yee.Zer-Intel: @Prakash : Mr TA Poh is waiting for you at the Logic Design booth [ 01/04/13 7:51 PM] VENKATA: thanks. i was on 27th

[ 01/04/13 7:52 PM] Yee.Zer-Intel: @Venkata - we received your resume and Mr James Lim from Structural Design is awaiting you in his booth

[ 01/04/13 7:52 PM] VENKATA: thanks

[ 01/04/13 7:53 PM] Yee.Zer-Intel:

Just a reminder that the event will be ending in 7 minutes. We’ll do our best to answer your questions in this time. For more information about Intel, please visit intel.com or connect with us through social media on Facebook, LinkedIn or Twitter! We love to hear your feedback! Please complete our short event survey located in the bottom left of the screen.

[ 01/04/13 7:54 PM] Yee.Zer-Intel: We really appreciate you stopping by our event - Thank you for visiting us!

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[ 01/04/13 8:00 PM] EG-Intel: Thanks everyone for participating in this event, have a nice weekend.

[ 01/04/13 8:00 PM] Yee.Zer-Intel:

Our career fair is now ending. We appreciate your questions and the time you took to meet with us today. We hope this event helped you to better understand Intel and the jobs available. For more information about Intel, please visit intel.com or connect with us through social media on Facebook, LinkedIn or Twitter! We love to hear your feedback! Please complete our short event survey located in the bottom left of the screen.For your convenience, this chat transcript will be available for further

[ 01/04/13 8:03 PM] Joycelyn-Intel: Thank you everyone. We enjoyed networking with you.

[ 01/04/13 8:04 PM] Rachel-Intel: Thanks for joining us today.