6.2.120 mcast_overlay_bar
6.3 Device 0 Function 0 Region DMIRCBAR
DMI Root Complex Registers Block (RCRB). This block is mapped into memory space, using register DMIRCBAR [Device 0:Function 0, offset 0x50].
6.3.1 dmivc0rcap
DMI VC0 Resource Capability
Register Name Offset Size
dmivc0rcap 0x10 32
dmivc0rctl 0x14 32
dmivc0rsts 0x1a 16
dmivc1rcap 0x1c 32
dmivc1rctl 0x20 32
dmivc1rsts 0x26 16
dmivcprcap 0x28 32
dmivcprctl 0x2c 32
dmivcprsts 0x32 16
dmivcmrcap 0x34 32
dmivcmrctl 0x38 32
dmivcmrsts 0x3e 16
dmivc1cdtthrottle 0x60 32
dmivcpcdtthrottle 0x64 32
dmivcmcdtthrottle 0x68 32
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x10
Bit Attr Default Description
31:16 RO 0x0 maxtimeslots:
Max Time Slots
15:15 RO 0x0 rejsnpt:
Reject Snoop Transactions
0: Transactions with or without the No Snoop bit set within the TLP header are allowed on this VC.
1: Any transaction without the No Snoop bit set within the TLP header will be rejected as an Unsupported Request.
6.3.2 dmivc0rctl
DMI VC0 Resource Control
Controls the resources associated with PCI Express Virtual Channel 0.
6.3.3 dmivc0rsts
DMI VC0 Resource Status.
Reports the Virtual Channel specific status.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x14
Bit Attr Default Description
31:31 RO 0x1 vc0e:
Virtual Channel 0 Enable
For VC0 this is hardwired to 1 and read only as VC0 can never be disabled.
26:24 RO 0x0 vc0id:
Virtual Channel 0 ID
Assigns a VC ID to the VC resource. For VC0 this is hardwired to 0 and read only.
7:7 RO 0x0 tc7vc0m:
Traffic Class 7/ Virtual Channel 0 Map Traffic Class 7 is always routed to VCm.
6:1 RW-LB 0x3f tcvc0m:
Traffic Class / Virtual Channel 0 Map
Indicates the TCs (Traffic Classes) that are mapped to the VC resource. Bit locations within this field correspond to TC values.For example, when bit 6 is set in this field, TC6 is mapped to this VC resource. When more than one bit in this field is set, it indicates that multiple TCs are mapped to the VC resource. In order to remove one or more TCs from the TC/VC Map of an enabled VC, software must ensure that no new or outstanding transactions with the TC labels are targeted at the given Link.
0:0 RO 0x1 tc0vc0m:
Traffic Class 0 / Virtual Channel 0 Map Traffic Class 0 is always routed to VC0.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x1a
Bit Attr Default Description
1:1 RO-V 0x1 vc0np:
Virtual Channel 0 Negotiation Pending 0: The VC negotiation is complete.
1: The VC resource is still in the process of negotiation (initialization or disabling).
This bit indicates the status of the process of Flow Control initialization. It is set by default on Reset, as well as whenever the corresponding Virtual Channel is Disabled or the Link is in the DL_Down state.
It is cleared when the link successfully exits the FC_INIT2 state.
BIOS Requirement: Before using a Virtual Channel, software must check whether the VC Negotiation Pending fields for that Virtual Channel are cleared in both Components on a Link.
6.3.4 dmivc1rcap
DMI VC1 Resource Capability
6.3.5 dmivc1rctl
DMI VC1 Resource Control
Controls the resources associated with PCI Express Virtual Channel 1.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x1c
Bit Attr Default Description
15:15 RO 0x1 rejsnpt:
Reject Snoop Transactions
0: Transactions with or without the No Snoop bit set within the TLP header are allowed on this VC.
1: Any transaction without the No Snoop bit set within the TLP header will be rejected as an Unsupported Request.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x20
Bit Attr Default Description
31:31 RW-LB 0x0 vc1e:
Virtual Channel 1 Enable 0: Virtual Channel is disabled.
1: Virtual Channel is enabled. See exceptions below.
Software must use the VC Negotiation Pending bit to check whether the VC negotiation is complete. When VC Negotiation Pending bit is cleared, a 1 read from this VC Enable bit indicates that the VC is enabled (Flow Control Initialization is completed for the PCI Express port). A 0 read from this bit indicates that the Virtual Channel is currently disabled.
BIOS Requirement:
1. To enable a Virtual Channel, the VC Enable bits for that Virtual Channel must be set in both Components on a Link.
2. To disable a Virtual Channel, the VC Enable bits for that Virtual Channel must be cleared in both Components on a Link.
3. Software must ensure that no traffic is using a Virtual Channel at the time it is disabled.
4. Software must fully disable a Virtual Channel in both Components on a Link before re-enabling the Virtual Channel.
26:24 RW-LB 0x1 vc1id:
Virtual Channel 1 ID
Assigns a VC ID to the VC resource. Assigned value must be non-zero. This field can not be modified when the VC is already enabled.
7:7 RO 0x0 tc7vc1m:
Traffic Class 7/ Virtual Channel 1 Map Traffic Class 7 is always routed to VCm.
6.3.6 dmivc1rsts
DMI VC1 Resource Status
Reports the Virtual Channel specific status.
6:1 RW-LB 0x0 tcvc1m:
Traffic Class / Virtual Channel 1 Map
Indicates the TCs (Traffic Classes) that are mapped to the VC resource. Bit locations within this field correspond to TC values.For example, when bit 6 is set in this field, TC6 is mapped to this VC resource. When more than one bit in this field is set, it indicates that multiple TCs are mapped to the VC resource. In order to remove one or more TCs from the TC/VC Map of an enabled VC, software must ensure that no new or outstanding transactions with the TC labels are targeted at the given Link.
0:0 RO 0x0 tc0vc1m:
Traffic Class 0 / Virtual Channel 0 Map Traffic Class 0 is always routed to VC0.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x20
Bit Attr Default Description
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x26
Bit Attr Default Description
1:1 RO-V 0x1 vc1np:
Virtual Channel 1 Negotiation Pending 0: The VC negotiation is complete.
1: The VC resource is still in the process of negotiation (initialization or disabling).
This bit indicates the status of the process of Flow Control initialization. It is set by default on Reset, as well as whenever the corresponding Virtual Channel is Disabled or the Link is in the DL_Down state.
It is cleared when the link successfully exits the FC_INIT2 state.
BIOS Requirement: Before using a Virtual Channel, software must check whether the VC Negotiation Pending fields for that Virtual Channel are cleared in both Components on a Link.
6.3.7 dmivcprcap
DMI VCP Resource Capability
6.3.8 dmivcprctl
DMI VCP Resource Control
Controls the resources associated with the DMI Private Channel (VCp).
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x1a
Bit Attr Default Description
15:15 RO 0x0 rejsnpt:
Reject Snoop Transactions
0: Transactions with or without the No Snoop bit set within the TLP header are allowed on this VC.
1: Any transaction without the No Snoop bit set within the TLP header will be rejected as an Unsupported Request.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x1a
Bit Attr Default Description
31:31 RW-LB 0x0 vcpe:
Virtual Channel Private Enable 0: Virtual Channel is disabled.
1: Virtual Channel is enabled. See exceptions below.
Software must use the VC Negotiation Pending bit to check whether the VC negotiation is complete. When VC Negotiation Pending bit is cleared, a 1 read from this VC Enable bit indicates that the VC is enabled (Flow Control Initialization is completed for the PCI Express port). A 0 read from this bit indicates that the Virtual Channel is currently disabled.
BIOS Requirement:
1. To enable a Virtual Channel, the VC Enable bits for that Virtual Channel must be set in both Components on a Link.
2. To disable a Virtual Channel, the VC Enable bits for that Virtual Channel must be cleared in both Components on a Link.
3. Software must ensure that no traffic is using a Virtual Channel at the time it is disabled.
4. Software must fully disable a Virtual Channel in both Components on a Link before re-enabling the Virtual Channel.
26:24 RW-LB 0x2 vcpid:
Virtual Channel Private ID
Assigns a VC ID to the VC resource. This field can not be modified when the VC is already enabled. No private VCs are precluded by hardware and private VC handling is implemented the same way as non-private VC handling.
7:7 RO 0x0 tc7vcpm:
Traffic Class 7/ Virtual Channel 0 Map Traffic Class 7 is always routed to VCm.
6.3.9 dmivcprsts
DMI VCP Resource Status
Reports the Virtual Channel specific status.
6:1 RW-LB 0x0 tcvcpm:
Traffic Class / Virtual Channel private Map
Indicates the TCs (Traffic Classes) that are mapped to the VC resource. Bit locations within this field correspond to TC values.For example, when bit 6 is set in this field, TC6 is mapped to this VC resource. When more than one bit in this field is set, it indicates that multiple TCs are mapped to the VC resource. In order to remove one or more TCs from the TC/VC Map of an enabled VC, software must ensure that no new or outstanding transactions with the TC labels are targeted at the given Link.
0:0 RO 0x0 tc0vcpm:
Traffic Class 0 / Virtual Channel Private Map Traffic Class 0 is always routed to VC0.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x1a
Bit Attr Default Description
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x32
Bit Attr Default Description
1:1 RO-V 0x1 vcpnp:
Virtual Channel Private Negotiation Pending 0: The VC negotiation is complete.
1: The VC resource is still in the process of negotiation (initialization or disabling).
This bit indicates the status of the process of Flow Control initialization. It is set by default on Reset, as well as whenever the corresponding Virtual Channel is Disabled or the Link is in the DL_Down state.
It is cleared when the link successfully exits the FC_INIT2 state.
BIOS Requirement: Before using a Virtual Channel, software must check whether the VC Negotiation Pending fields for that Virtual Channel are cleared in both Components on a Link.
6.3.10 dmivcmrcap
DMI VCM Resource Capability
6.3.11 dmivcmrctl
DMI VCM Resource Control
Controls the resources associated with PCI Express Virtual Channel 0.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x34
Bit Attr Default Description
15:15 RO 0x1 rejsnpt:
Reject Snoop Transactions
0: Transactions with or without the No Snoop bit set within the TLP header are allowed on this VC.
1: Any transaction without the No Snoop bit set within the TLP header will be rejected as an Unsupported Request.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x38
Bit Attr Default Description
31:31 RW-LB 0x0 vcme:
Virtual Channel M Enable 0: Virtual Channel is disabled.
1: Virtual Channel is enabled. See exceptions below.
Software must use the VC Negotiation Pending bit to check whether the VC negotiation is complete. When VC Negotiation Pending bit is cleared, a 1 read from this VC Enable bit indicates that the VC is enabled (Flow Control Initialization is completed for the PCI Express port). A 0 read from this bit indicates that the Virtual Channel is currently disabled.
BIOS Requirement:
1. To enable a Virtual Channel, the VC Enable bits for that Virtual Channel must be set in both Components on a Link.
2. To disable a Virtual Channel, the VC Enable bits for that Virtual Channel must be cleared in both Components on a Link.
3. Software must ensure that no traffic is using a Virtual Channel at the time it is disabled.
4. Software must fully disable a Virtual Channel in both Components on a Link before re-enabling the Virtual Channel.
26:24 RW-LB 0x0 vcmid:
VCm ID
7:7 RO 0x1 tc7vcpm:
Traffic Class 7/ Virtual Channel 0 Map Traffic Class 7 is always routed to VCm.
6:1 RO 0x0 tcvcmm:
Traffic Class / Virtual Channel M Map No other traffic class is mapped to VCM
0:0 RO 0x0 tc0vcmm:
Traffic Class 0 Virtual Channel Map
6.3.12 dmivimrsts
DMI VCM Resource Status
Reports the Virtual Channel specific status.
6.3.13 dmivc1cdtthrottle
DMI VC1 Credit Throttle
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x3e
Bit Attr Default Description
1:1 RO-V 1b vcmnp:
Virtual Channel M Negotiation Pending 0: The VC negotiation is complete.
1: The VC resource is still in the process of negotiation (initialization or disabling).
This bit indicates the status of the process of Flow Control initialization. It is set by default on Reset, as well as whenever the corresponding Virtual Channel is Disabled or the Link is in the DL_Down state.
It is cleared when the link successfully exits the FC_INIT2 state.
BIOS Requirement: Before using a Virtual Channel, software must check whether the VC Negotiation Pending fields for that Virtual Channel are cleared in both Components on a Link.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x60
Bit Attr Default Description
31:24 RWS 0x0 prd:
Posted Request Data VC1 Credit Withhold
Number of VC1 Posted Data credits to withhold from being reported or used.
21:16 RWS 0x0 prh:
Posted Request Header VC1 Credit Withhold
Number of VC1 Posted Request credits to withhold from being reported or used.
15:8 RWS 0x0 nprd:
Non-Posted Request Data VC1 Credit Withhold
Number of VC1 Non-Posted Data credits to withhold from being reported or used.
5:0 RWS 0x0 nprh:
Non-Posted Request Header VC1 Credit Withhold
Number of VC1 Non-Posted Request credits to withhold from being reported or used.
6.3.14 dmivcpcdtthrottle
DMI VCp Credit Throttle
6.3.15 dmivcmcdtthrottle
DMI VCm Credit Throttle
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x64
Bit Attr Default Description
31:24 RWS 0x0 prd:
Posted Request Data VCp Credit Withhold
Number of VCp Posted Data credits to withhold from being reported or used.
21:16 RWS 0x0 prh:
Posted Request Header VCp Credit Withhold
Number of VCp Posted Request credits to withhold from being reported or used.
15:8 RWS 0x0 nprd:
Non-Posted Request Data VCp Credit Withhold
Number of VCp Non-Posted Data credits to withhold from being reported or used.
5:0 RWS 0x0 nprh:
Non-Posted Request Header VCp Credit Withhold
Number of VCp Non-Posted Request credits to withhold from being reported or used.
Type: MEM PortID: 8’h7e
Bus: 0 Device: 0 Function: 0
Offset: 0x68
Bit Attr Default Description
31:24 RWS 0x0 prd:
Posted Request Data VCm Credit Withhold
Number of VCm Posted Data credits to withhold from being reported or used.
21:16 RWS 0x0 prh:
Posted Request Header VCm Credit Withhold
Number of VCm Posted Request credits to withhold from being reported or used.
15:8 RWS 0x0 nprd:
Non-Posted Request Data VCm Credit Withhold
Number of VCm Non-Posted Data credits to withhold from being reported or used.
5:0 RWS 0x0 nprh:
Non-Posted Request Header VCm Credit Withhold
Number of VCm Non-Posted Request credits to withhold from being reported or used.