Fig.9.3BlockdiagramofGP202112-channelbasebandreceiver
172 9 The Zarlink 12-Channel GPS Receiver
CARRIER DCO 27-BITS 16-BITACCUMULATE ANDDUMP,QUAD. TRACKING
16-BITACCUMULATE ANDDUMP,INPHASE TRACKING 16-BITACCUMULATE ANDDUMP,INPHASE PROMPT 16-BITACCUMULATE ANDDUMP,QUAD. PROMPT
C/ACODE GENERATOR C/AEPOCH
CODECLOCK DCO,26-BITS DIV 2
CODE PHASE COUNTER CLK
RESET CLKRESET
RESET RESET
1KHz
RESET
0DEG. DATA_IN DATA_IN
CODE (DITH,EARLY,LATE) 2.046MHz
1.023MHz
DATA_IN
DATA_IN PROMPT CODESLEW @1/2CHIPRES.
DIGITAL IFINPUT @1.405MHz
90DEG Q
DIV&CNT BY20DIV&CNTBY50
CARRIER CYCLE CNTER
PROMPT CORRELATOR TRACKCORRELATOR
PROMPT CORRELATOR
TRACKING CORRELATOR REMOVE DOPPLERREMOVE DOPPLER IN/OUT DATA BUS
+
-+ -1, 1
+ -1,
+ -1,
+ -3
+ -2
+ -2,
+ -3,
+ -6
+ -1,
+ -2
+ -1,0
+ -1,
+ -2,
+ -3,
+ -6
I 50HzDATA CLK
WC, 11-BITLTCH WM,10-BIT Wd,5-BITLTCH Ws,6-BITLTCHTIC
P,10-BITLTCH K,20-BIT
LTCH
TIC
DIV 7
40MHz SAMPLECLK @5.71428MHz ALSOTOCODEDCO WsCORRESPONDSTO1-SECDIAL WdCORRESPONDSTO20-MSECDIAL WcCORRESPONDSTO1-MSECDIAL WmCORRESPONDSTO0.488-USECDIAL UNCORRECTEDESTIMATEOFSVTRANSMITTTIME={GPSEC_CNT+[Ws*20mSEC]+[Wd*1mSEC]+[Wc*0.488uSEC]+[Wm*0.477nSEC]}SECONDS (GPSECCNTIS#OFSECONDSFROMBEGINOFWEEK,COUNTEDINSOFTWARE)
(UPPER) (UPPER)
1.405MHz
~2MHz
~0Hz~2MHz ~0Hz
~0Hz
~100Hz ~0Hz~100Hz ~0Hz
~100Hz ~0Hz
~100Hz
~2MHz
SPECTRUMAMPLITUDESSMALLERFORQCHANNEL@LOCK LTCH
DUMP SIGNAL (C/A EPOCH)
Fig.9.4BlockdiagramofasinglechannelofGP2021(spectrumshowninlockmode)
9.2 ZarLink GP2021 12-Channel Baseband Processor 173
The GPS100SC used a single mixer for correlation and a single mixer for Doppler strip off. The GP2021 uses In-phase and Quadrature (I and Q) processing for Doppler removal. This I and Q processing is also used by the C/A code-loop processing. The purpose here is to not only to facilitate the remove the Doppler but also to demodulate the 50 Hz data at the same time. By properly using the information provided by the I and Q arms, the Doppler loop can be closed. The host computer must close the Doppler loop in software.
The computer uses the data gathered from the I/Q arms to dynamically correct the DCO frequency. It does this by reading the 16-bit accumulator information. Exactly how these accumulators work is covered below. The control loop must constantly measure and correct the DCO so as to keep it nearly equal in frequency and phase to the received IF at 1.405 MHz. This is of course exactly as was done in the GPS100SC receiver. The difference is the coherent design and frequency precision of the GP2015/2021 allows this to be done without the frequency counter used in the GPS100SC design. The particulars of the Doppler control loop are discussed below.
9.2.3 C/A Code Sliding Correlators
After the two Quadrature mixers used to remove Doppler offset, four mixers are encountered. These are all used for C/A code correlation. Each one of these mixers is used as a sliding correlator. In the GPS100SC, we only had one correlator used both for Code Scan and Track. The additional correlators are used to facilitate the capture process of the C/A code. They also provide a PROMPT channel free of induced modulation used to drive the code-tracking loop.
The two correlators on the INPHASE arm are used for tracking the C/A code and also aid in the capture process. The two correlators in the QUADRATURE arm normally are used only during the signal-acquisition process. The reason is simple.
Once Doppler has been properly tracked the signal level in the QUADRATURE arm is very low. Just the opposite is true for the INPHASE arm. Once Code and Doppler processes are in track mode the INPHASE arm will have most of the signal energy.
Like the Doppler process the C/A code correlators output is obtained by reading the 16-Bit accumulators. Unlike the GPS100SC where there were separate structures for the Doppler and Code tracking loop information, these two loops share common structures in the GP2015/2021 to accomplish these tasks. In particular, the 16-Bit accumulators provide information for both the Code and Doppler tracking loops.
9.2.4 C/A Code-Clock Generator
The code-clock generator in the GPS100SC was a simple shift register used to divide down and modulate the TCXO referenced frequency at 20.46 MHz. In the GP2021, the code clock is a DCO very similar to that used in the Doppler loop. This oscillator
174 9 The Zarlink 12-Channel GPS Receiver
has extremely fine frequency and phase resolution. It creates the C/A code by direct synthesis using a clock signal derived from the 40 MHz CLK_T signal, see above.
Digital commands can change the frequency of the code-clock generation. Also, the phase of the code clock can be set to a particular value after a reset event.
9.2.5 Prompt Channel, Early, Late, and Dither Codes
The GPS100SC used the Tau-Dither code tracking method. In Tau-Dither, one correlator is used for both tracking and the channel that will be used to demodulate the 50 Hz data. In the GP2021, an extra correlator is available for the PROMPT channel. The PROMPT channel usually is not used in the C/A code acquisition or track process. Rather, it is the channel where the demodulated data and Doppler Information is extracted.
The GP2021 has several modes available for the code-tracking loop. The most unusual is the case where a C/A code replica is created that has both Early and Late codes combined into a single signal EARLY-MINUS-LATE signal. Additionally, the GP2021 can provide a DITHERED code to one correlator in each arm. In this mode, it resembles the GPS100SC the most. The difference is that there is a PROMPT correlator with the C/A code at the midpoint between the two dithered codes. The DITHERD code is switched at a rate of 50 Hz. In the GPS100SC, we used 166 Hz.
9.2.6 C/A Code Scanning, Slewing
In the GPS100SC, the C/A code was scanned by the same mechanism used in the track function, the Code-Clock Modulator. In the GP2021, things are more compli-cated. A method to advance/retard the C/A in ½ chip steps is provided for code scanning orslewing.This allows the scanning process to get the C/A code within ½ chip of alignment. If this triggers a correlation detection event, the remainder of the code alignment is done by adjustments to code-clock frequency via the code DCO.
The Code DCO is not adjustable in phase (except at reset) so the remaining code misalignment is corrected by adjustments to the DCO frequency register. This changes the C/A code-clock rate, which moves the replica code with respect to the received code.
9.2.7 Code-Phase Counter and Code-Clock Phase
Just as in the GPS100SC, a method is needed to record the state of the replica C/A code generator. The GP2021 has two places to retrieve code-phase information.
9.2 ZarLink GP2021 12-Channel Baseband Processor 175
The code-phase state counter is done more or less the same as done in the GPS100SC receiver except it records to a ½ chip resolution. This is a linear counter whose contents reflect the Code State in ½ chip increments. This is latched by TIC (typically, every 1/10 s) and can be read by the host computer. This has a time resolution of one C/A code chip or about ½ms. This is of course is the 1 ms dial of the replica clock with twice as many increments (2,046 total ) compared to the GPS100SC version (1,023 total).
Additionally, the phase register of the code-clock DCO can be recorded at the TIC time signal. The DCO phase register resolution is very high at 1/2,048 of a chip. This works out to be a time resolution of about 0.5 ns. In the GPS100SC receiver, we had 20 increments on the 0.977 ms dial. The GP2021 has 1,024 increments on a 0.488 ms dial! Figure 9.5 shows the GP2021 replica clock. In theory, the GP2021 can resolve down to about 0.15 m. But jitter in the C/A code loop and other uncertainties insure this accuracy will not be achieved in the range measurement with just C/A code measurements, see Chap. 8.