10 Electrical and Thermal Characteristics
10.3 General DC Characteristics
Electrical and Thermal Characteristics
10 Electrical and Thermal
Electrical and Thermal Characteristics
VCCAMPHYPLL_1P05 1.05 0.145 0.4 4.344 0 0
VCCPRIM_1P05 1.05 7.169+
HSIO Lane Adder refer to Table 10-6
column DT
121.697 1.622 A 0 0
VCCPRIM_MPHY_1P05 1.05 0.106 0.307 4.313 0 0
VCCDSW_1P05 1.05 0.01 0.2 0.003 0.2 0
VCCDUSB_1P05 1.05 0.421 5.698 60.397 0 0
VCCHDA 3.3 0.008 0.1 4.998 0 0
1.8 0.005 0.06 3 0 0
1.5 0.004 0.05 2.5 0 0
VCCDSW_3P3 3.3 0.113 0.534 0.705 1.05 0
VCCPRIM_3P3 3.3 0.383 0.391 3.378 0 0
VCCPGPPA 3.3 0.102 0.135 0.378 0 0
1.8 0.061 0.121 0.340 0 0
VCCPGPPBC 3.3 0.344 0.262 0.853 0 0
1.8 0.206 0.236 0.767 0 0
VCCPGPPD 3.3 0.14 0.122 0.402 0 0
1.8 0.084 0.110 0.362 0 0
VCCPGPPEF 3.3 0.175 0.2 0.345 0 0
1.8 0.104 0.180 0.310 0 0
VCCPGPPG_3P3 3.3 0.145 0.1 0.072 0 0
VCCPGPPHK 3.3 0.263 0.2 0.509 0 0
1.8 0.157 0.180 0.458 0 0
VCCPRIM_1P8 1.8 0.183+
CNVi Adder refer to Table 10-7,
column DT
6.835 18.202 0 0
VCCRTC1 3.0 0.60 mA 0.317 0.075 0.316 6
VCCSPI 3.3 0.05 0.1 0.153 0 0
1.8 0.03 0.09 0.138 0 0
Notes:
1. The VCC rail ICC data is taken at 3.0 V while the system is in a mechanical off (G3) state at room temperature.
2. Iccmax estimates assumes 110 °C.
3. The Iccmax value is a steady state current that can happen after respective power ok has asserted (or reset signal has de-asserted).
4. Sx Icc Idle assumes PCH is idle and Intel® CSME is power gated.
Table 10-2. PCH Icc3 with Integrated 1.8V VRM Mode OFF (Desktop SKUs) (Sheet 2 of 2)
Voltage Rail Voltage (V)
Iccmax S0 Current2
(A)
Icc IdleSx Current4
(mA)
S0ix Icccmax
Current (mA)
Deep Sx Icc Idle Current
(mA)
(μA)G3
Electrical and Thermal Characteristics
Table 10-3. PCH Icc3 with Integrated 1.8V VRM Mode OFF (H Mobile SKUs) (Sheet 1 of 2)
Voltage Rail Voltage (V)
Iccmax S0 Current2 (A)
Icc IdleSx Current4
(mA)
S0ix Icccmax
Current (mA)
Deep Sx Icc Idle Current
(mA)
(μA)G3
VCCAPLL_1P05 1.05 0.034 0.2 0.801 0 0
VCCA_BCLK_1P05 1.05 0.007 0.1 0.087 0 0
VCCA_SRC_1P05 1.05 0.141 0.3 0.838 0 0
VCCA_XTAL_1P05 1.05 0.005 0.544 0.195 0 0
VCCAMPHYPLL_1P05 1.05 0.114 0.4 1.192 0 0
VCCPRIM_1P05 1.05 4.174+
HSIO Lane Adder refer to
Table 10-6 column HALO
40.344 0.477 A 0 0
VCCPRIM_MPHY_1P0
5 1.05 0.088 0.2 1.22 0 0
VCCDSW_1P05 1.05 0.01 0.2 0.001 0.2 0
VCCDUSB_1P05 1.05 0.33 1.288 16.373 0 0
VCCHDA 3.3 0.006 0.1 4.908 0 0
1.8 0.004 0.06 2.944 0 0
1.5 0.003 0.05 2.454 0 0
VCCDSW_3P3 3.3 0.094 0.2 0.705 1.05 0
VCCPRIM_3P3 3.3 0.318 0.3 0.916 0 0
VCCPGPPA 3.3 0.085 0.1 0.103 0 0
1.8 0.051 0.09 0.092 0 0
VCCPGPPBC 3.3 0.286 0.2 0.232 0 0
1.8 0.171 0.18 0.208 0 0
VCCPGPPD 3.3 0.117 0.1 0.109 0 0
1.8 0.070 0.09 0.098 0 0
VCCPGPPEF 3.3 0.145 0.2 0.094 0 0
1.8 0.087 0.18 0.084 0 0
VCCPGPPG_3P3 3.3 0.121 0.1 0.072 0 0
VCCPGPPHK 3.3 0.219 0.2 0.138 0 0
1.8 0.131 0.18 0.124 0 0
VCCPRIM_1P8 1.8 0.152+
CNVi Adder refer to Table 10-7, column HALO
6.607 9.411 0 0
VCCRTC1 3.0 0.31 mA 0.299 0.075 0.316 6
VCCSPI 3.3 0.042 0.1 0.153 0 0
1.8 0.025 0.09 0.138 0 0
Electrical and Thermal Characteristics
Notes:
1. The VCC rail ICC data is taken at 3.0 V while the system is in a mechanical off (G3) state at room temperature.
2. Iccmax estimates assumes 110 °C.
3. The Iccmax value is a steady state current that can happen after respective power ok has asserted (or reset signal has de-asserted).
4. Sx Icc Idle assumes PCH is idle and Intel® CSME is power gated.
Table 10-4. PCH Icc3 with Integrated 1.8V VRM Mode ON (Desktop SKUs) (Sheet 1 of 2)
Voltage Rail Voltage (V)
Iccmax S0 Current2 (A)
Icc IdleSx Current4
(mA)
Icccmax S0ix Current
(mA)
Deep Sx Icc Idle Current
(mA)
(μA)G3
VCCAPLL_1P05 1.05 0.041 0.2 0.801 0 0
VCCA_BCLK_1P05 1.05 0.009 0.1 0.321 0 0
VCCA_SRC_1P05 1.05 0.169 0.313 3.092 0 0
VCCA_XTAL_1P05 1.05 0.005 0.551 0.195 0 0
VCCAMPHYPLL_1P05 1.05 0.145 0.4 4.344 0 0
VCCPRIM_1P05 1.05 7.169+
HSIO Lane Adder refer to
Table 10-6, column DT
121.697 1.622 A 0 0
VCCPRIM_MPHY_1P05 1.05 0.106 0.307 4.313 0 0
VCCDSW_1P05 1.05 0.01 0.2 0.003 0.2 0
VCCDUSB_1P05 1.05 0.421 5.698 60.397 0 0
VCCHDA 3.3 0.008 0.1 4.998 0 0
1.8 0.005 0.06 3 0 0
1.5 0.004 0.05 2.5 0 0
VCCDSW_3P3 3.3 0.113 0.534 0.705 1.05 0
VCCPRIM_3P3 3.3 0.761+
CNVi Adder refer to Table 10-8,
column DT
9.451 30.811 0 0
VCCPGPPA 3.3 0.102 0.135 0.378 0 0
1.8 0.061 0.121 0.340 0 0
VCCPGPPBC 3.3 0.344 0.262 0.853 0 0
1.8 0.206 0.236 0.767 0 0
VCCPGPPD 3.3 0.14 0.122 0.402 0 0
1.8 0.084 0.110 0.362 0 0
Table 10-3. PCH Icc3 with Integrated 1.8V VRM Mode OFF (H Mobile SKUs) (Sheet 2 of 2)
Voltage Rail Voltage (V)
Iccmax S0 Current2 (A)
Icc IdleSx Current4
(mA)
S0ix Icccmax
Current (mA)
Deep Sx Icc Idle Current
(mA)
(μA)G3
Electrical and Thermal Characteristics
VCCPGPPHK 3.3 0.263 0.2 0.509 0 0
1.8 0.157 0.18 0.458 0 0
VCCRTC 3.0 0.60 mA 0.317 0.075 0.316 6
VCCSPI 3.3 0.05 0.1 0.153 0 0
1.8 0.03 0.09 0.138 0 0
Notes:
1. The VCC rail ICC data is taken at 3.0 V while the system is in a mechanical off (G3) state at room temperature.
2. Iccmax estimates assumes 110 °C.
3. The Iccmax value is a steady state current that can happen after respective power ok has asserted (or reset signal has de-asserted).
4. Sx Icc Idle assumes PCH is idle and Intel® CSME is power gated.
Table 10-5. PCH Icc3 with Integrated 1.8V VRM Mode ON (H Mobile SKUs) (Sheet 1 of 2)
Voltage Rail Voltage (V) S0 Iccmax Current2 (A)
Icc IdleSx Current4
(mA)
Icccmax S0ix Current
(mA)
Deep Sx Icc Idle Current
(mA)
(μA)G3
VCCAPLL_1P05 1.05 0.034 0.2 0.801 0 0
VCCA_BCLK_1P05 1.05 0.007 0.1 0.087 0 0
VCCA_SRC_1P05 1.05 0.141 0.3 0.838 0 0
VCCA_XTAL_1P05 1.05 0.005 0.544 0.195 0 0
VCCAMPHYPLL_1P05 1.05 0.114 0.4 1.192 0 0
VCCPRIM_1P05 1.05 4.174+
HSIO Lane Adder refer to
Table 10-6, column HALO
40.344 0.477 A 0 0
VCCPRIM_MPHY_1P05 1.05 0.088 0.2 1.22 0 0
VCCDSW_1P05 1.05 0.01 0.2 0.001 0.2 0
VCCDUSB_1P05 1.05 0.33 1.288 16.373 0 0
VCCHDA 3.3 0.007 0.1 4.908 0 0
VCCDSW_3P3 3.3 0.094 0.2 0.705 1.05 0
VCCPRIM_3P3 3.3 0.536+
CNVi Adder refer to Table 10-8, column HALO
8.732 17.105 0 0
VCCPGPPA 3.3 0.085 0.1 0.103 0 0
VCCPGPPBC 3.3 0.286 0.2 0.232 0 0
VCCPGPPD 3.3 0.117 0.1 0.109 0 0
VCCPGPPEF 3.3 0.145 0.2 0.094 0 0
VCCPGPPG_3P3 3.3 0.121 0.1 0.072 0 0
VCCPGPPHK 3.3 0.219 0.2 0.138 0 0
VCCRTC 3.0 0.31 mA 0.299 0.075 0.316 6
Table 10-4. PCH Icc3 with Integrated 1.8V VRM Mode ON (Desktop SKUs) (Sheet 2 of 2)
Voltage Rail Voltage (V)
Iccmax S0 Current2 (A)
Icc IdleSx Current4
(mA)
Icccmax S0ix Current
(mA)
Deep Sx Icc Idle Current
(mA)
(μA)G3
Electrical and Thermal Characteristics
VCCSPI 3.3 0.042 0.1 0.153 0 0
Notes:
1. The VCC rail ICC data is taken at 3.0 V while the system is in a mechanical off (G3) state at room temperature.
2. Iccmax estimates assumes 110 °C.
3. The Iccmax value is a steady state current that can happen after respective power ok has asserted (or reset signal has de-asserted).
4. Sx Icc Idle assumes PCH is idle and Intel® CSME is power gated.
5. Sx Icc at 3.3 V level is assumed. Sx Icc data at the 1.8 V and/or 1.5 V level not measured.
Table 10-6. PCH VCCPRIM_1P05 Adder per HSIO Lane
Details Icc (HALO) (mA) Icc (DT)
(mA)
Baseline (x4 DMI Gen3) 639 1116
Baseline (x4 DMI Gen2) 607 1084
Each PCIe Gen3 Lane 148 178
Each PCIe Gen2 Lane 123 152
Each USB 3.1 Gen 2 (10 Gb/s) Port 182 221
Each USB 3.1 Gen 1 (5 Gb/s) Port 125 155
Integrated GbE Port 62 98
Each SATA 6 Gb/s Port 126 167
Table 10-7. PCH VCCPRIM_1P8 Adder with and without CNVi
Details Icc (HALO) (mA) Icc (DT)
(mA)
Without CNVi 0 0
With CNVi 582 589
Table 10-8. PCH VCCPRIM_3P3 Adder with and without CNVi
Details Icc (HALO) (mA) Icc (DT)
(mA)
Without CNVi 0 0
With CNVi 582 589
Table 10-5. PCH Icc3 with Integrated 1.8V VRM Mode ON (H Mobile SKUs) (Sheet 2 of 2)
Voltage Rail Voltage (V) S0 Iccmax Current2 (A)
Icc IdleSx Current4
(mA)
Icccmax S0ix Current
(mA)
Deep Sx Icc Idle Current
(mA)
(μA)G3
Electrical and Thermal Characteristics
Table 10-9. Single-Ended Signal DC Characteristics as Inputs or Outputs (Sheet 1 of 7)
Type Symbol Parameter Minimum Maximum Unit Condition Notes NOTE: For GPIO pads (GPP) listed in the Associated Signals below, all functions that are
multiplexed on GPIO pads will have the same DC characteristics as the GPIO pads. Refer to the GPIO Chapter for the multiplexed functions on a specific GPIO pad.
Associated Signals1: GPP_A0/RCIN#/ESPI_ALERT1#, GPP_A1/LAD0/ESPI_IO0, GPP_A2/LAD1/ESPI_IO1, GPP_A3/LAD2/ESPI_IO2, GPP_A4/LAD3/ESPI_IO3, GPP_A5/LFRAME#/ESPI_CS0#, GPP_A6/SERIRQ/
ESPI_CS1#, GPP_A7/PIRQA#/ESPI_ALERT0#, GPP_A8/CLKRUN#, GPP_A9/CLKOUT_LPC0/ESPI_CLK, GPP_A10/CLKOUT_LPC1, GPP_A11/PME#/SD_VDD2_PWR_EN#, GPP_A12/BM_BUSY#/ISH_GP6/
SX_EXIT_HOLDOFF#, GPP_A13/SUSWARN#/SUSPWRDNACK, GPP_A14/SUS_STAT#/ESPI_RESET#, GPP_A15/
SUSACK#, GPP_A16/CLKOUT_48, GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7, GPP_A18/ISH_GP0, GPP_A19/
ISH_GP1, GPP_A20/ISH_GP2, GPP_A21/ISH_GP3, GPP_A22/ISH_GP4, GPP_A23/ISH_GP5, GPP_D17/
DMIC_CLK1/SNDW3_CLK, GPP_D18/DMIC_DATA1/SNDW3_DATA, GPP_D19/DMIC_CLK0/SNDW4_CLK, GPP_D20/DMIC_DATA0/SNDW4_DATA, HDA_BCLK/I2S0_SCLK, HDA_RST#/I2S1_SCLK, HDA_SYNC/
I2S0_SFRM, HDA_SDO/I2S0_TXD, HDA_SDI0/I2S0_RXD, HDA_SDI1/I2S1_RXD 3.3V Operation
Input
VIH Input High Voltage
Threshold 0.75 x VCC — V
VIL Input Low Voltage
Threshold — 0.25 x VCC V
IIL Input Leakage
Current -12 12 μA
CIN Input Pin
Capacitance — 13 pF
Output
VOH Output High Voltage
Threshold VCC - 0.45 VCC V IOH=3 mA
VOL Output Low Voltage
Threshold — 0.45 V IOL=-3 mA
Rpu WPU (WeakPull-Up)
Resistance 5K-70%
20K-25%
5K+70%
20K+25%
Rpd WPD (Weak
Pull-Down) Resistance 5K-70%
20K-25%
5K+70%
20K+25%
1.8V Operation
Input
VIH Input High Voltage
Threshold 0.75 x VCC — V
VIL Input Low Voltage
Threshold — 0.25 x VCC V
IIL Input Leakage
Current -12 12 μA
CIN Input Pin
Capacitance — 13 pF
Output
VOH Output High Voltage
Threshold VCC - 0.45 VCC V IOH=3 mA
VOL Output Low Voltage
Threshold — 0.45 V IOL=-3 mA
Rpu WPU Resistance 5K-70%
20K-25%
5K+70%
20K+25%
Rpd WPD Resistance 5K-70%
20K-25%
5K+70%
20K+25%
Notes:
1. For GPIO supported voltages, refer to GPIO chapter.
Electrical and Thermal Characteristics
NOTE: For GPIO pads (GPP) listed in the Associated Signals below, all functions that are multiplexed on GPIO pads will have the same DC characteristics as the GPIO pads. Refer to the GPIO Chapter for the muxed functions on a specific GPIO pad.
Associated Signals1: GPP_B0/GSPI0_CS1#, GPP_B1/GSPI1_CS1#/TIME_SYNC1, GPP_B2/VRALERT#, GPP_B3/
CPU_GP2, GPP_B4/CPU_GP3, GPP_B5/SRCCLKREQ0#, GPP_B6/SRCCLKREQ1#, GPP_B7/SRCCLKREQ2#, GPP_B8/SRCCLKREQ3#, GPP_B9/SRCCLKREQ4#, GPP_B10/SRCCLKREQ5#, GPP_B11/I2S_MCLK, GPP_B12/
SLP_S0#, GPP_B13/PLTRST#, GPP_B14/SPKR, GPP_B15/GSPI0_CS0#, GPP_B16/GSPI0_CLK, GPP_B17/
GSPI0_MISO, GPP_B18/GSPI0_MOSI, GPP_B19/GSPI1_CS0#, GPP_B20/GSPI1_CLK, GPP_B21/GSPI1_MISO, GPP_B22/GSPI1_MOSI, GPP_B23/SML1ALERT#/PCHHOT#, GPP_C0/SMBCLK, GPP_C1/SMBDATA, GPP_C2/
SMBALERT#, GPP_C3/SML0CLK, GPP_C4/SML0DATA, GPP_C5/SML0ALERT#, GPP_C6/SML1CLK, GPP_C7/
SML1DATA, GPP_C8/UART0A_RXD, GPP_C9/UART0A_TXD, GPP_C10/UART0A_RTS#, GPP_C11/UART0A_CTS#, GPP_C12/UART1_RXD/ISH_UART1_RXD, GPP_C13/UART1_TXD/ISH_UART1_TXD, GPP_C14/UART1_RTS#/
ISH_UART1_RTS#, GPP_C15/UART1_CTS#/ISH_UART1_CTS#, GPP_C16/I2C0_SDA, GPP_C17/I2C0_SCL, GPP_C18/I2C1_SDA, GPP_C19/I2C1_SCL, GPP_C20/UART2_RXD, GPP_C21/UART2_TXD, GPP_C22/
UART2_RTS#, GPP_C23/UART2_CTS#, GPP_D0/SPI1_CS#/SBK0/BK0, GPP_D1/SPI1_CLK/SBK1/BK1, GPP_D2/SPI1_MISO/SBK2/BK2, GPP_D3/SPI1_MOSI/SBK3/BK3, GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4/
BK4, GPP_D5/I2S2_SFRM/CNV_RF_RESET#, GPP_D6/I2S2_TXD/MODEM_CLKREQ, GPP_D7/I2S2_RXD, GPP_D8/I2S2_SCLK, GPP_D9/ISH_SPI_CS#/GSPI2_CS0#, GPP_D10/ISH_SPI_CLK/GSPI2_CLK, GPP_D11/
ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO, GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI, GPP_D13/
ISH_UART0_RXD/I2C2_SDA, GPP_D14/ISH_UART0_TXD/I2C2_SCL, GPP_D15/ISH_UART0_RTS#/
GSPI2_CS1#/CNV_WFEN, GPP_D16/ISH_UART0_CTS#/CNV_WCEN, GPP_D21/SPI1_IO2, GPP_D22/SPI1_IO3, GPP_D23/ISH_I2C2_SCL/I2C3_SCL, GPD0/BATLOW#, GPD1/ACPRESENT, GPD2/LAN_WAKE#, GPD3/
PWRBTN#, GPD4/SLP_S3#, GPD5/SLP_S4#, GPD6/SLP_A#, GPD7, GPD8/SUSCLK, GPD9/SLP_WLAN#, GPD10/SLP_S5#, GPD11/LANPHYPC, SLP_LAN#, SLP_SUS#, GPD2/LAN_WAKE#, DRAM_RESET#
3.3V Operation
Input
VIH Input High Voltage
Threshold 0.75 x VCC — V
VIL Input Low Voltage
Threshold — 0.25 x VCC V
IIL Input Leakage
Current -10 10 μA
CIN Input Pin
Capacitance — 14 pF
Output
VOH Output High Voltage
Threshold VCC - 0.45 VCC V IOH=3 mA
VOL Output Low Voltage
Threshold — 0.45 V IOL=-3 mA
Rpu
WPU Resistance 1K-50%
5K-70%
20K-25%
1K+100%
5K+70%
20K+25%
Rpd WPD Resistance 5K-70%
20K-35%
5K+70%
20K+35%
1.8V Operation
Input
VIH Input High Voltage
Threshold 0.75 x VCC — V
VIL Input Low Voltage
Threshold — 0.25 x VCC V
IIL Input Leakage
Current -10 10 μA
CIN Input Pin
Capacitance — 14 pF
Table 10-9. Single-Ended Signal DC Characteristics as Inputs or Outputs (Sheet 2 of 7)
Type Symbol Parameter Minimum Maximum Unit Condition Notes
Electrical and Thermal Characteristics
Output
VOH Output High Voltage
Threshold VCC - 0.45 V IOH=3 mA
VOL Output Low Voltage
Threshold — 0.45 V IOL=-3 mA
Rpu
WPU Resistance 1K-50%
5K-70%
20K-25%
1K+100%
5K+70%
20K+25%
Rpd WPD Resistance 5K-70%
20K-25%
5K+70%
20K+25%
Notes:
1. For GPIO supported voltages, refer to GPIO chapter.
NOTE: For GPIO pads (GPP) listed in the Associated Signals below, all functions that are multiplexed on GPIO pads will have the same DC characteristics as the GPIO pads. Refer to the GPIO Chapter for the muxed functions on a specific GPIO pad.
Associated Signals1: GPP_G0/SD_CMD, GPP_G1/SD_DATA0, GPP_G2/SD_DATA1, GPP_G3/SD_DATA2, GPP_G4/SD_DATA3, GPP_G5/SD_CD#, GPP_G6/SD_CLK, GPP_G7/SD_WP
3.3V Operation
Input
VIH Input High Voltage
Threshold 0.75 x VCC — V
VIL Input Low Voltage
Threshold — 0.25 x VCC V
IIL Input Leakage
Current -12 12 μA
CIN Input Pin
Capacitance — 13 pF
Output
VOH Output High Voltage
Threshold VCC - 0.45 VCC V IOH=3 mA
VOL Output Low Voltage
Threshold — 0.45 V IOL=-3 mA
Rpu WPU Resistance 5K-70%
20K-25%
5K+70%
20K+25%
Rpd WPD Resistance 5K-70%
20K-25%
5K+70%
20K+25%
1.8V Operation
Input
VIH Input High Voltage
Threshold 0.75 x VCC — V
VIL Input Low Voltage
Threshold — 0.25 x VCC V
IIL Input Leakage
Current -12 12 μA
CIN Input Pin
Capacitance — 13 pF
Output
VOH Output High Voltage
Threshold VCC - 0.45 VCC V IOH=3 mA
VOL Output Low Voltage
Threshold — 0.45 V IOL=-3 mA
Rpu WPU Resistance 5K-70%
20K-25%
5K+70%
20K+25%
Rpd WPD Resistance 5K-70%
20K-25%
5K+70%
20K+25%
Table 10-9. Single-Ended Signal DC Characteristics as Inputs or Outputs (Sheet 3 of 7)
Type Symbol Parameter Minimum Maximum Unit Condition Notes
Electrical and Thermal Characteristics
Notes:
1. For GPIO supported voltages, refer to GPIO chapter.
NOTE: For GPIO pads (GPP) listed in the Associated Signals below, all functions that are multiplexed on GPIO pads will have the same DC characteristics as the GPIO pads. Refer to the GPIO Chapter for the muxed functions on a specific GPIO pad.
Associated Signals: GPP_K0, GPP_K1, GPP_K2, GPP_K3, GPP_K4, GPP_K5, GPP_K6, GPP_K7, GPP_K8, GPP_K9, GPP_K10, GPP_K11, GPP_K12/GSXDOUT, GPP_K13/GSXSLOAD, GPP_K14/GSXDIN, GPP_K15/
GSXSRESET#, GPP_K16/GSXCLK, GPP_K17/ADR_COMPLETE, GPP_K18/NMI#, GPP_K19/SMI#, GPP_K20, GPP_K21, GPP_K22/IMGCLKOUT0, GPP_K23/IMGCLKOUT1, GPP_H0/SRCCLKREQ6#, GPP_H1/SRCCLKREQ7#, GPP_H2/SRCCLKREQ8#, GPP_H3/SRCCLKREQ9#, GPP_H4/SRCCLKREQ10#, GPP_H5/SRCCLKREQ11#, GPP_H6/SRCCLKREQ12#, GPP_H7/SRCCLKREQ13#, GPP_H8/SRCCLKREQ14#, GPP_H9/SRCCLKREQ15#, GPP_H10/SML2CLK, GPP_H11/SML2DATA, GPP_H12/SML2ALERT#, GPP_H13/SML3CLK, GPP_H14/SML3DATA, GPP_H15/SML3ALERT#, GPP_H16/SML4CLK, GPP_H17/SML4DATA, GPP_H18/SML4ALERT#, GPP_H19/
ISH_I2C0_SDA, GPP_H20/ISH_I2C0_SCL, GPP_H21/ISH_I2C1_SDA, GPP_H22/ISH_I2C1_SCL, GPP_H23/
TIME_SYNC0, GPP_I0/DDPB_HPD0/DISP_MISC0, GPP_I1/DDPC_HPD1/DISP_MISC1, GPP_I2/DDPD_HPD2/
DISP_MISC2, GPP_I3/DDPF_HPD3/DISP_MISC3, GPP_I4/EDP_HPD/DISP_MISC4, GPP_I5/DDPB_CTRLCLK, GPP_I6/DDPB_CTRLDATA, GPP_I7/DDPC_CTRLCLK, GPP_I8/DDPC_CTRLDATA, GPP_I9/DDPD_CTRLCLK, GPP_I10/DDPD_CTRLDATA, GPP_I11/M2_SKT2_CFG0, GPP_I12/M2_SKT2_CFG1, GPP_I13/M2_SKT2_CFG2, GPP_I14/M2_SKT2_CFG3, SYS_PWROK, SYS_RESET#
3.3V Operation
Input
VIH Input High Voltage
Threshold 0.75 x VCC — V
VIL Input Low Voltage
Threshold — 0.25 x VCC V
IIL Input Leakage
Current -10 10 μA
CIN Input Pin
Capacitance — 14 pF
Output
VOH Output High Voltage
Threshold VCC - 0.45 VCC V IOH=3 mA
VOL Output Low Voltage
Threshold — 0.45 V IOL=-3 mA
Rpu
WPU Resistance 1K-50%
5K-70%
20K-35%
1K+100%
5K+70%
20K+35%
Rpd WPD Resistance 5K-70%
20K-35%
5K+70%
20K+35%
1.8V Operation
Input
VIH Input High Voltage
Threshold 0.75 x VCC — V
VIL Input Low Voltage
Threshold — 0.25 x VCC V
IIL Input Leakage
Current -10 10 μA
CIN Input Pin
Capacitance — 14 pF
Table 10-9. Single-Ended Signal DC Characteristics as Inputs or Outputs (Sheet 4 of 7)
Type Symbol Parameter Minimum Maximum Unit Condition Notes
Electrical and Thermal Characteristics
Output
VOH Output High Voltage
Threshold VCC - 0.45 VCC V IOH=3 mA
VOL Output Low Voltage
Threshold — 0.45 V IOL=-3 mA
Rpu
WPU Resistance 1K-50%
5K-70%
20K-35%
1K+100%
5K+70%
20K+35%
Rpd WPD Resistance 5K-70%
20K-35%
5K+70%
20K+35%
NOTE: For GPIO pads (GPP) listed in the Associated Signals below, all functions that are multiplexed on GPIO pads will have the same DC characteristics as the GPIO pads. Refer to the GPIO Chapter for the muxed functions on a specific GPIO pad.
Associated Signals: GPP_E0/SATAXPCIE0/SATAGP0, GPP_E1/SATAXPCIE1/SATAGP1, GPP_E2/SATAXPCIE2/
SATAGP2, GPP_E3/CPU_GP0, GPP_E4/SATA_DEVSLP0, GPP_E5/SATA_DEVSLP1, GPP_E6/SATA_DEVSLP2, GPP_E7/CPU_GP1, GPP_E8/SATALED#, GPP_E9/USB2_OC0#, GPP_E10/USB2_OC1#, GPP_E11/USB2_OC2#, GPP_E12/USB2_OC3#, GPP_F0/SATAXPCIE3/SATAGP3, GPP_F1/SATAXPCIE4/SATAGP4, GPP_F2/SATAXPCIE5/
SATAGP5, GPP_F3/SATAXPCIE6/SATAGP6, GPP_F4/SATAXPCIE7/SATAGP7, GPP_F5/SATA_DEVSLP3, GPP_F6/
SATA_DEVSLP4, GPP_F7/SATA_DEVSLP5, GPP_F8/SATA_DEVSLP6, GPP_F9/SATA_DEVSLP7, GPP_F10/
SATA_SCLOCK, GPP_F11/SATA_SLOAD, GPP_F12/SATA_SDATAOUT1, GPP_F13/SATA_SDATAOUT0, GPP_F14/
PS_ON#, GPP_F15/USB2_OC4#, GPP_F16/USB2_OC5#, GPP_F17/USB2_OC6#, GPP_F18/USB2_OC7#, GPP_F19/eDP_VDDEN, GPP_F20/eDP_BKLTEN, GPP_F21/eDP_BKLTCTL, GPP_F22/DDPF_CTRLCLK, GPP_F23/
DDPF_CTRLDATA, SPI0_IO2, SPI0_IO3, GPP_B16/GSPI0_CLK 3.3V Operation
Input
VIH Input High Voltage
Threshold 0.75 x VCC — V
VIL Input Low Voltage
Threshold — 0.25 x VCC V
IIL Input Leakage
Current -12 12 μA
CIN Input Pin
Capacitance — 13 pF
Output
VOH Output High Voltage
Threshold VCC - 0.45 VCC V IOH=3 mA
VOL Output Low Voltage
Threshold — 0.45 V IOL=-3 mA
Rpu WPU Resistance 5K-70%
20K-25%
5K+70%
20K+35%
Rpd WPD Resistance 5K-70%
20K-25%
5K+70%
20K+35%
1.8V Operation
Input
VIH Input High Voltage
Threshold 0.75 x VCC — V
VIL Input Low Voltage
Threshold — 0.25 x VCC V
IIL Input Leakage
Current -12 12 μA
CIN Input Pin
Capacitance — 13 pF
Table 10-9. Single-Ended Signal DC Characteristics as Inputs or Outputs (Sheet 5 of 7)
Type Symbol Parameter Minimum Maximum Unit Condition Notes
Electrical and Thermal Characteristics
Output
VOH Output High Voltage
Threshold VCC - 0.45 VCC V IOH=3 mA
VOL Output Low Voltage
Threshold — 0.45 V IOL=-3 mA
Rpu WPU Resistance 5K-70%
20K-25%
5K+70%
20K+35%
Rpd WPD Resistance 5K-70%
20K-25%
5K+70%
20K+35%
Associated Signals: PM_SYNC, PECI, CPUPWRGD, THRMTRIP#, PLTRST_CPU#, PM_DOWN, TRIGGER_IN, TRIGGER_OUT, PCH_JTAG_TDO, PCH_JTAGX, PRDY#, PREQ#, CPU_TRST#, PCH_JTAG_TDI, PCH_JTAG_TMS, PCH_JTAG_TCK, ITP_PMODE, HDACPU_SDI, HDACPU_SCLK, HDACPU_SDO
1.05V Operation
Input
VIH
Input High Voltage
Threshold JTAG: 0.8 x VCC PECI: 0.7 x
VCC iDISPLAY:
0.65 x VCC
— V
VIL
Input Low Voltage Threshold
—
JTAG: 0.45 x VCC PECI: 0.3 x
VCC iDISPLAY:
0.3 x VCC V
IIL Input Leakage
Current -10 10 μA
CIN Input Pin
Capacitance — 2 pF
Output
VOH Output High Voltage
Threshold 0.75 x VCC VCC V IOH=6 mA
VOL
Output Low Voltage Threshold
— 0.25 x VCC V
IOL(min)=-0.5 mA IOL(max)=-1
mA
Rpu WPU Resistance 1K-30%
20K-30%
1K+30%
20K+30%
Rpd WPD Resistance 1K-30%
20K-30%
1K+30%
20K+30%
Associated Signals: GPP_J0/CNV_PA_BLANKING, GPP_J1/CPU_C10_GATE#, GPP_J2, GPP_J3, GPP_J4/
CNV_BRI_DT/UART0B_RTS#, GPP_J5/CNV_BRI_RSP/UART0B_RXD, GPP_J6/CNV_RGI_DT/UART0B_TXD, GPP_J7/CNV_RGI_RSP/UART0B_CTS#, GPP_J8/CNV_MFUART2_RXD, GPP_J9/CNV_MFUART2_TXD, GPP_J10, GPP_J11/A4WP_PRESENT
3.3V Operation
Input
VIH Input High Voltage
Threshold 0.65 x VCC — V
VIL Input Low Voltage
Threshold — 0.35 x VCC V
Table 10-9. Single-Ended Signal DC Characteristics as Inputs or Outputs (Sheet 6 of 7)
Type Symbol Parameter Minimum Maximum Unit Condition Notes
Electrical and Thermal Characteristics
Output
VOH Output High Voltage
Threshold VCC - 0.45 — V IOH=3 mA
VOL Output Low Voltage
Threshold — 0.45 V IOL=-3 mA
Rpu WPU Resistance 20K-40% 20K+40%
Rpd WPD Resistance 20K-40% 20K+40%
1.8V Operation
Input
VIH Input High Voltage
Threshold 0.65 x VCC — V
VIL Input Low Voltage
Threshold — 0.35 x VCC V
IIL Input Leakage
Current -5 5 μA
CIN Input Pin
Capacitance — 5 pF
Output
VOL Output Low Voltage
Threshold VCC - 0.45 —
V IOL=-3 mA
— 0.45
Rpu WPU Resistance
Threshold 20K-40% 20K+40%
Rpd WPD Resistance 20K-40% 20K+40%
Notes:
1. The VOH specification does not apply to open-collector or open-drain drivers. Signals of this type must have an external pull-up resistor, and that is what determines the high-output voltage level.
2. Input characteristics apply when a signal is configured as Input or to signals that are only Inputs. Output characteristics apply when a signal is configured as an Output or to signals that are only Outputs.
Table 10-10. Single-Ended Signal DC Characteristics as Inputs or Outputs
Type Symbol Parameter Minimum Maximum Unit Condition Notes Associated Signals: INTRUDER#, RSMRST#, PCH_PWROK, DSW_PWROK, SRTCRST#
Input
VIH Input High Voltage
Threshold 0.65 x
VCCRTC VCCRTC+0.5 V 1, 2
VIL Input Low Voltage
Threshold -0.5 0.3 x
VCCRTC V 2
Associated Signals: RTCRST#
Input
VIH Input High Voltage
Threshold 0.75 x
VCCRTC VCCRTC+0.5 V 1, 2
VIL Input Low Voltage
Threshold -0.5 0.4 x
VCCRTC V 2
Associated Signals: RTCX1#
Input
VIH Input High Voltage
Threshold 0.8 1.2 V
VIL Input Low Voltage
Threshold -0.5 0.1 V
Notes:
1. VCCRTC is the voltage applied to the VCCRTC well of the PCH. When the system is in G3 state, it is generally supplied by the coin cell battery.
2. These buffers have input hysteresis. VIH levels are for rising edge transitions and VIL levels are for falling edge transitions.
Table 10-9. Single-Ended Signal DC Characteristics as Inputs or Outputs (Sheet 7 of 7)
Type Symbol Parameter Minimum Maximum Unit Condition Notes
Electrical and Thermal Characteristics
Table 10-11. Differential Signals Characteristics (Sheet 1 of 3)
Symbol Parameter Minimum Maximum Unit Conditions Notes
Associated Signals: PCIe 9, 10
Gen 1 VTX-DIFF P-P Differential Peak to Peak
Output Voltage 0.8 1.2 V 1
VTX-DIFF P-P - Low Low power differential Peak to
Peak Output Voltage 0.4 1.2 V
VTX_CM-ACp TX AC Common Mode Output
Voltage (2.5 GT/s) — 20 mV
ZTX-DIFF-DC DC Differential TX Impedance 80 120 Ohm
VRX-DIFF p-p Differential Input Peak to
Peak Voltage 0.12 1.2 V 1
VRX_CM-ACp AC peak Common Mode Input
Voltage — 150 mV
Gen 2 VTX-DIFF P-P Differential Peak to Peak
Output Voltage 0.8 1.2 V
VTX-DIFF P-P - Low Low power differential Peak to
Peak Output Voltage 0.4 1.2 V
VTX_CM-Acp-p TX AC Common Mode Output
Voltage (5GT/s) — 100 mV
ZTX-DIFF-DC DC Differential TX Impedance 80 120 Ohm
VRX-DIFF p-p Differential Input Peak to
Peak Voltage 0.12 1.2 V
VRX_CM-ACp AC peak Common Mode Input
Voltage — 150 mV
Gen 3 VTX-DIFF P-P Differential Peak to Peak
Output Voltage 0.8 1.3 V
VTX-DIFF P-P - Low Low power differential Peak to
Peak Output Voltage 0.4 1.2 V
VTX_CM-Acp-p TX AC Common Mode Output
Voltage (8GT/s) — 100 mV
ZTX-DIFF-DC DC Differential TX Impedance 80 120 Ohm
VRX-DIFF p-p Differential Input Peak to
Peak Voltage Refer to Stressed Voltage Eye Parameters Table in PCIe GEN3 industry specifications.
VRX_CM-ACp AC peak Common Mode Input
Voltage — 150 mV
Associated Signals: SATA
VIMIN-Gen1i Minimum Input Voltage -
1.5Gb/s internal SATA 325 — mVdiff p-p 2
VIMAX-Gen1i Maximum Input Voltage -
1.5Gb/s internal SATA — 600 mVdiff p-p 2
VIMIN-Gen1m Minimum Input Voltage -
1.5Gb/s eSATA 240 — mVdiff p-p 2
VIMAX-Gen1m Maximum Input Voltage -
1.5Gb/s eSATA — 600 mVdiff p-p 2
VIMIN-Gen2i Minimum Input Voltage -
275 — mVdiff p-p 2
Electrical and Thermal Characteristics
VIMAX-Gen2m Maximum Input Voltage -
3.0Gb/s eSATA — 750 mVdiff p-p 2
VIMIN-Gen3i Minimum Input Voltage -
6.0Gb/s internal SATA 240 — mVdiff p-p 2
VIMAX-Gen3i Maximum Input Voltage -
6.0Gb/s internal SATA — 1000 mVdiff p-p 2
VOMIN-Gen1i,m Minimum Output Voltage
1.5Gb/s internal and eSATA 400 — mVdiff p-p 3
VOMAX-Gen1i,m Maximum Output Voltage
1.5Gb/s internal and eSATA — 600 mVdiff p-p 3
VOMIN-Gen2i,m Minimum Output Voltage
3.0Gb/s internal and eSATA 400 — mVdiff p-p 3
VOMAX-Gen2i,m Maximum Output Voltage
3.0Gb/s internal and eSATA — 700 mVdiff p-p 3
VOMIN-Gen3i Minimum Output Voltage
6.0Gb/s internal SATA 200 — mVdiff p-p 3
VOMAX-Gen3i Maximum Output Voltage
6.0Gb/s internal SATA — 900 mVdiff p-p 3
Associated Signals: USB 2.0
VDI Differential Input Sensitivity 0.2 — V 4, 6
VCM Differential Common Mode
Range 0.8 2.5 V 5, 6
VSE Single-Ended Receiver
Threshold 0.8 2 V 6
VCRS Output Signal Crossover
Voltage 1.3 2 V 6
VOL Output Low Voltage — 0.4 V IOL=5 mA 6
VOH Output High Voltage 3.3V – 0.5 — V IOH=-2 mA 6
VHSSQ HS Squelch Detection
Threshold 100 150 mV 7
VHSDSC HS Disconnect Detection
Threshold 525 625 mV 7
VHSCM HS Data Signaling Common
Mode Voltage Range -50 500 mV 7
VHSOI HS Idle Level -10 10 mV 7
VHSOH HS Data Signaling High 360 440 mV 7
VHSOL HS Data Signaling Low -10 10 mV 7
VCHIRPJ Chirp J Level 700 1100 mV 7
VCHIRPK Chirp K Level -900 -500 mV 7
Associated Signals: USB 3.1
VTX-DIFF-PP Differential Peak to Peak
Output Voltage 0.8 1.2 V
VTX-DIFF P-P - Low Low power differential Peak to
Peak Output Voltage 0.4 1.2 V 8
VTX_CM-Acp-p TX AC Common Mode Output
Voltage (5GT/s) — 100 mV
ZTX-DIFF-DC DC Differential TX Impedance 72 120 Ohm
VRX-DIFF p-p Differential Input Peak to
Peak Voltage 0.1 1.2 V
VRX_CM-ACp AC peak Common Mode Input
Voltage — 150 mV
Table 10-11. Differential Signals Characteristics (Sheet 2 of 3)
Symbol Parameter Minimum Maximum Unit Conditions Notes